CY7C1480BV25

CY7C1482BV25, CY7C1486BV25

72-Mbit (2 M × 36/4 M × 18/1 M × 72)

Pipelined Sync SRAM

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

•

408-943-2600

Document Number: 001-15143 Rev. *H

Revised May 4, 2011

72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined Sync SRAM

Features

interleaved or linear burst sequences

CY7C1482BV25

available

in

JEDEC-standard Pb-free 100-pin thin quad flat pack (TQFP),

Pb-free and non Pb-free 165-ball fine-pitch ball grid array

(FBGA) package. CY7C1486BV25 available in Pb-free and

non-Pb-free 209-ball FBGA package

Functional Description

The

CY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]

SRAM integrates 2 M × 36/4 M × 18/1 M × 72 SRAM cells with

advanced synchronous peripheral circuitry and a two-bit counter

for internal burst operation. All synchronous inputs are gated by

registers controlled by a positive-edge-triggered Clock Input

(CLK). The synchronous inputs include all addresses, all data

Write (GW). Asynchronous inputs include the Output Enable

(OE) and the ZZ pin.

Addresses and chip enables are registered at rising edge of

clock when either Address Strobe Processor (ADSP) or Address

Strobe Controller (ADSC) is active. Subsequent burst addresses

can be internally generated as controlled by the Advance pin

(ADV).

Address, data inputs, and write controls are registered on-chip

to initiate a self timed Write cycle. This part supports Byte Write

operations (see Pin Definitions on page 8 and Truth Table on

page 11 for further details). Write cycles can be one to two or four

bytes wide, as controlled by the byte write control inputs. When

it is active LOW, GW writes all bytes.

Selection Guide

Description

250 MHz

200 MHz

167 MHz

Unit

Maximum access time

3.0

3.0

3.4

ns

Maximum operating current

450

450

400

mA

Maximum complementary metal oxide semiconductor (CMOS)

standby current

120

120

120

mA

Note

1. For best practices recommendations, refer to the Cypress application note AN1064, SRAM System Guidelines.

[+] Feedback