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CY7C1007D-10VXI Datasheet(PDF) 7 Page - Cypress Semiconductor |
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CY7C1007D-10VXI Datasheet(HTML) 7 Page - Cypress Semiconductor |
7 / 14 page CY7C107D CY7C1007D Document #: 38-05469 Rev. *H Page 7 of 14 Data Retention Characteristics (Over the Operating Range) Parameter Description Conditions Min Max Unit VDR VCC for data retention 2.0 V ICCDR Data retention current VCC = VDR = 2.0 V, CE > VCC – 0.3 V, VIN > VCC – 0.3 V or VIN < 0.3 V 3mA tCDR [12] Chip deselect to data retention time 0 ns tR [13] Operation recovery time tRC ns Data Retention Waveform Switching Waveforms Figure 1. Read Cycle No. 1 (Address Transition Controlled) [14, 15] Figure 2. Read Cycle No. 2 [15, 16] 4.5V 4.5V tCDR VDR > 2V DATA RETENTION MODE tR CE VCC PREVIOUS DATA VALID DATA VALID tRC tAA tOHA ADDRESS DATA OUT 50% 50% DATA VALID tRC tACE tLZCE tPU HIGH IMPEDANCE tHZCE tPD HIGH ICC ISB IMPEDANCE ADDRESS CE DATA OUT VCC SUPPLY CURRENT Notes 12. AC characteristics (except High-Z) are tested using the load conditions shown in Figure (a). High-Z characteristics are tested for all speeds using the test load shown in Figure (c) 13. Full device operation requires linear VCC ramp from VDR to VCC(min) > 50 s or stable at VCC(min) > 50 s. 14. Device is continuously selected, CE = VIL. 15. WE is HIGH for read cycle. 16. Address valid prior to or coincident with CE transition LOW. [+] Feedback |
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