CY2XF33

Document Number: 001-53148 Rev. *E

Page 5 of 12

Absolute Maximum Conditions

Parameter

Description

Condition

Min

Max

Unit

Supply voltage

–

–0.5

4.4

V

[1]

Input voltage, DC

–0.5

V

Temperature, storage

Non operating

–55

135

C

Temperature, junction

–

–40

135

C

ESD protection (human body model)

JEDEC STD 22-A114-B

2000

–

V



JA

[2]

Thermal resistance, junction to ambient 0 m/s airflow

64

C/W

Operating Conditions

Parameter

Description

Min

Typ

Max

Unit

3.3 V supply voltage range

3.135

3.3

3.465

V

2.5 V supply voltage range

2.375

2.5

2.625

V

monotonic)

0.05

–

500

ms

Ambient temperature (commercial)

0

–

70

C

Ambient temperature (industrial)

–40

–

85

C

Notes

1. The voltage on any input or I/O pin cannot exceed the power pin during power up.

2. Simulated. The board is derived from the JEDEC multilayer standard. It measures 76 x 114 x 1.6 mm and has 4-layers of copper (2/1/1/2 oz.). The internal layers

are 100% copper planes, while the top and bottom layers have 50% metalization. No vias are included in the model.

4. Not 100% tested, guaranteed by design and characterization.

DC Electrical Characteristics

Parameter

Description

Condition

Min

Typ

Max

Unit

[3]

Operating supply current

terminated

––

120

mA

terminated

––

115

mA

LVDS differential output voltage

as terminated in Figure 2

247–454

mV

V

OD

complementary output states

as terminated in Figure 2

––

50

mV

LVDS offset output voltage

as terminated in Figure 2

1.125

–

1.375

V

V

OS

complementary output states

between CLK and CLK#

––

50

mV

Input high voltage

–

0.7 ×

––

V

Input low voltage

–

–

–

0.3 ×

V

Input high current, FS0 pin

––

115

A

Input high current, FS1 pin

––

10

A

Input low current, FS0 pin

–50

–

–

A

Input low current, FS1 pin

–20

–

–

A

[4]

Input capacitance, FS0 pin

–

–

15

–

pF

[4]

Input capacitance, FS1 pin

–

–

4

–

pF