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ISL9444 Datasheet(PDF) 4 Page - Intersil Corporation

Part # ISL9444
Description  Triple, 180째 Out-of-Phase, Synchronous Step-Down PWM Controller
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL9444 Datasheet(HTML) 4 Page - Intersil Corporation

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ISL9444
4
FN7665.0
May 23, 2011
24
ISEN3
Current signal input for PWM3. This pin is used to monitor the voltage drop across the lower MOSFET for current loop
feedback and overcurrent protection.
25
PHASE3
Phase node connection for PWM3. This pin is connected to the junction of the upper MOSFET’s source, output filter inductor,
and lower MOSFET’s drain. PHASE3 is the internal lower supply rail for the UGATE3.
26
BOOT3
Bootstrap pin to provide bias for PWM3 high-side driver. The positive terminal of the bootstrap capacitor connects to this
pin. The bootstrap diodes are integrated to help reduce total cost and reduce layout complexity.
27
UGATE3
High-side MOSFET gate driver output for PWM3.
28
LGATE3
Low-side MOSFET gate driver output for PWM3.
29
PGND
Power ground connection for all three PWM channels. This pin should be connected to the sources of the lower MOSFETs
and the (-) terminals of the external input capacitors
30
CLKOUT
Clock signal output. The frequency of the clock signal is two times of the ISL9444 switching frequency set by the resistor
from RT to ground.
31
ISEN2
Current signal input for PWM2. This pin is used to monitor the voltage drop across the lower MOSFET for current loop
feedback and overcurrent protection.
32
PHASE2
Phase node connection for PWM2. This pin is connected to the junction of the upper MOSFET’s source, output filter inductor,
and lower MOSFET’s drain. PHASE2 is the internal lower supply rail for the UGATE2.
33
BOOT2
Bootstrap pin to provide bias for PWM2 high-side driver. The positive terminal of the bootstrap capacitor connects to this
pin. The bootstrap diodes are integrated to help reduce total cost and reduce layout complexity.
34
UGATE2
High-side MOSFET gate driver output for PWM2.
35
LGATE2
Low-side MOSFET gate driver output for PWM2.
36
LGATE1
Low-side MOSFET gate driver output for PWM1.
37
UGATE1
High-side MOSFET gate driver output for PWM1.
38
BOOT1
Bootstrap pin to provide bias for PWM1 high-side driver. The positive terminal of the bootstrap capacitor connects to this
pin. The bootstrap diodes are integrated to help reduce total cost and reduce layout complexity.
39
PHASE1
Phase node connection for PWM1. This pin is connected to the junction of the upper MOSFET’s source, output filter inductor,
and lower MOSFET’s drain. PHASE1 is the internal lower supply rail for the UGATE1.
40
ISEN1
Current signal input for PWM1. This pin is used to monitor the voltage drop across the lower MOSFET for current loop
feedback and overcurrent protection.
-
EPAD
EPAD at ground potential. Solder it directly to GND plane for better thermal performance.
Pin Descriptions (Continued)
PIN
NAME
FUNCTION


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