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TPS40322 Datasheet(PDF) 5 Page - Texas Instruments

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Part No. TPS40322
Description  Dual Output or Two-Phase Synchronous Buck Controller
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS40322 Datasheet(HTML) 5 Page - Texas Instruments

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TPS40322
www.ti.com
SLUSAF8
– JUNE 2011
ELECTRICAL CHARACTERISTICS (continued)
TJ = –40°C to 125°C, VVDD = 12 V, RRT = 40 kΩ, fSW = 500 kHz (unless otherwise noted),
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ENABLE/SOFT START
VIH
High-level input voltage
0.55
0.70
1.00
V
VIL
Low-level input voltage
0.23
0.26
0.30
V
ISS
Soft-start source current
8
10
12
μA
VSS
Soft-start voltage level
0.8
V
IDISCHG
Soft-start discharge current
130
μA
OVERCURRENT PROTECTION
IILIM
ILIM program current
TJ = 25°C
9.5
10.0
10.5
μA
tHICCUP
Hiccup cycles to recover
6
Cycles
CURRENT SENSE AMPLIFIER
VDIFF
Differential input voltage range
–60
60
mV
VCM
Input common mode range
0
5.6
V
ACS
Current sensing gain
15
V/V
VCSOUT
Current sense amplifier output
VCSIN = 20 mV, TJ = 25°C
270
300
330
mV
fC0
Closed loop bandwidth(2)
3
MHz
Current sense amplifier output difference
VCSIN = 20 mV to both CS1 and CS2
–15
15
mV
between CH1 and CH2
OVERVOLTAGE/UNDERVOLTAGE PROTECTION
VOVP
Feedback voltage limit for OVP
679
700
735
mV
VUVP
Feedback voltage limit for UVP
475
500
525
mV
GATE DRIVERS
RHDHI
High-side driver pull-up resistance
VBOOT – VSW = 6.5 V, IHDRV = –40 mA
0.8
1.5
2.5
Ω
RHDLO
High-side driver pull-down resistance
VBOOT – VSW = 6.5 V, IHDRV = 40 mA
0.5
1.0
1.6
Ω
RLDHI
Low-side driver pull-up resistance
ILDRV = –40 mA
0.8
1.5
2.5
Ω
RLDLO
Low-side driver pull-down resistance
ILDRV = 40 mA
0.35
0.60
1.30
Ω
tHRISE
High-side driver rise time
CLOAD = 5 nF, See
(2)
15
ns
tHFALL
High-side driver fall time
CLOAD = 5 nF, See
(2)
12
ns
tLRISE
Low-side driver rise time
CLOAD = 5 nF, See
(2)
15
ns
tLFALL
Low-side driver fall time
CLOAD = 5 nF, See
(2)
10
ns
BOOT SWITCH
VDFWD
Bootstrap switch voltage drop
IBOOT = 5 mA
0.1
V
REMOTE SENSE
VIOFSET
Input offset voltage
VDIFFO = 0.9 V
–2
2
mV
Gain
Differential gain
0.995
1.005
V/V
BW
Close loop bandwidth(2)
2.00
MHz
VDIFFO
Output voltage at DIFFO pin
VBP6-0.2
V
ISRC
Output source current
1
mA
ISNK
Output sink current
1
mA
POWERGOOD
VOV
Feedback voltage limit for PGOOD
650
675
697
mV
VUV
Feedback voltage limit for PGOOD
510
525
545
mV
VPGD(hyst)
PGOOD hysteresis voltage at FB
25
40
mV
RRGD
PGOOD pull down resistance
50
70
Ω
IPGD(leak)
PGOOD leakage current
20
µA
THERMAL SHUTDOWN
TSD
Junction shutdown temperature
See (2)
150
°C
TSD(hyst)
Hysteresis
See (2)
20
°C
(2)
Specified by design. Not production tested.
Copyright
© 2011, Texas Instruments Incorporated
5


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