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F28M35H32B1RFPS Datasheet(PDF) 8 Page - Texas Instruments |
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F28M35H32B1RFPS Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 32 page  GPIO135/COMP5OUT 109 144 110 111 112 113 114 115 116 117 118 119 120 121 PG5_GPIO45 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 PC4_GPIO68 PC5_GPIO69 PC6_GPIO70 PC7_GPIO71 PH0_GPIO48 PH1_GPIO49 PE0_GPIO24 V DDIO PE1_GPIO25 PH4_GPIO52 PH5_GPIO53 PF4_GPIO36 PG0_GPIO40 PG1_GPIO41 PF5_GPIO37 PG7_GPIO47 PJ6_GPIO62 V DDIO V DD12 PJ5_GPIO61 PJ4_GPIO60 V DD12 V DDIO PJ3_GPIO59 PJ2_GPIO58 PJ1_GPIO57 PJ0_GPIO56 PD5_GPIO21 PD4_GPIO20 V DD12 V DDIO PD7_GPIO23 PF6_GPIO38 PG6_GPIO46 PG2_GPIO42 GPIO134 GPIO133/COMP4OUT GPIO132/COMP3OUT VREG18EN ADC1INB7 ADC1INB4 ADC1INB3 ADC1INB0 ADC1V , V REFLO SSA1 V DDA1 ADC1V REFHI ADC1INA0 ADC1INA2 ADC1INA3 ADC1INA4 ADC1INA6 ADC1INA7 ADC2INA7 ADC2INA6 ADC2INA4 ADC2INA3 ADC2INA2 ADC2INA0 ADC2V REFHI V DDA2 ADC2V REFLO ADC2INB0 ADC2INB3 ADC2INB4 ADC2INB7 GPIO128 GPIO129/COMP1OUT GPIO130/COMP6OUT GPIO131/COMP2OUT ARS F28M35H20B1, F28M35H20C1 F28M35H22B1, F28M35H22C1, F28M35H32B1, F28M35H32C1 F28M35H50B1, F28M35H50C1, F28M35H52B1, F28M35H52C1 SPRS742 – JUNE 2011 www.ti.com 3 Device Pins 3.1 Pin Assignments Figure 3-1 shows the 144-pin RFP PowerPAD ™ Thermally Enhanced Thin Quad Flatpack (HTQFP) pin assignments. A. See Table 3-1, Terminal Functions, for the complete multiplexed signal names. Figure 3-1. 144-Pin RFP PowerPAD ™ HTQFP (Top View) 8 Device Pins Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback |
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