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DAC3482 Datasheet(PDF) 10 Page - Texas Instruments |
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DAC3482 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 79 page  DAC3482 SLAS748A – MARCH 2011 – REVISED JUNE 2011 www.ti.com ELECTRICAL CHARACTERISTICS – DIGITAL SPECIFICATIONS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DIGITAL INPUT TIMING SPECIFICATIONS Timing LVDS inputs: D[15:0]P/N, FRAMEP/N, SYNCP/N, PARITYP/N, double edge latching Config36 Setting datadly clkdly 0 0 150 0 1 100 0 2 50 0 3 0 0 4 -50 Setup time, D[15:0]P/N, FRAMEP/N reset and frame indicator latched 0 5 -100 FRAMEP/N, SYNCP/N on rising edge of DATACLKP/N. ts(DATA) and PARITYP/N, valid to 0 6 -150 ps FRAMEP/N parity bit latched on falling edge either edge of 0 7 -200 of DATACLKP/N. DATACLKP/N 1 0 200 2 0 250 3 0 300 4 0 350 5 0 400 6 0 450 7 0 500 Config36 Setting datadly clkdly 0 0 350 0 1 400 0 2 450 0 3 500 0 4 550 Hold time, D[15:0]P/N, FRAMEP/N reset and frame indicator latched 0 5 600 FRAMEP/N, SYNCP/N on rising edge of DATACLKP/N. th(DATA) and PARITYP/N, valid 0 6 650 ps FRAMEP/N parity bit latched on falling edge after either edge of 0 7 700 of DATACLKP/N. DATACLKP/N 1 0 300 2 0 250 3 0 200 4 0 150 5 0 100 6 0 50 7 0 0 FRAMEP/N and t(FRAME_SYNC) fDATACLK is DATACLK frequency in MHz 1/2fDATACLK ns SYNCP/N pulse width 10 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): DAC3482 |
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