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TC1165 Datasheet(PDF) 29 Page - Infineon Technologies AG |
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TC1165 Datasheet(HTML) 29 Page - Infineon Technologies AG |
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29 / 133 page  TC1165/TC1166 Functional Description Preliminary Data Sheet 25 V1.0, 2008-04 3.2 On-Chip Memories As shown in the TC1165/TC1166 block diagram on Page 2-6, some of the TC1165/TC1166 units provide on-chip memories that are used as program or data memory. • Program memory in PMU – 16 Kbyte Boot ROM (BROM) – 1504 Kbyte Program Flash (PFlash) • Program memory in PMI – 16 Kbyte Scratch-Pad RAM (SPRAM) – 8 Kbyte Instruction Cache (ICACHE) • Data memory in PMU – 32 Kbyte Data Flash (DFlash) – 8 Kbyte Overlay RAM (OVRAM) • Data memory in DMI – 56 Kbyte Local Data RAM (LDRAM) • Memory of PCP2 – 12 Kbyte Code Memory (CMEM) with parity error protection – 8 Kbyte Parameter RAM (PRAM) with parity error protection • On-chip SRAM with parity error protection Features of Program Flash • 1504 Kbyte on-chip program Flash memory • Usable for instruction code or constant data storage • 256-byte program interface – 256 bytes are programmed into PFLASH page in one step/command • 256-bit read interface – Transfer from PFLASH to CPU/PMI by four 64-bit single cycle burst transfers • Dynamic correction of single-bit errors during read access • Detection of double-bit errors • Fixed sector architecture – Eight 16 Kbyte, one 128 Kbyte, one 256 Kbyte, one 512 Kbyte and one 480 Kbyte sectors – Each sector separately erasable – Each sector separately write-protectable • Configurable read protection for complete PFLASH with sophisticated read access supervision, combined with write protection for complete PFLASH (protection against “Trojan horse” software) • Configurable write protection for each sector – Each sector separately write-protectable – With capability to be re-programmed – With capability to be locked forever (OTP) • Password mechanism for temporary disabling of write and read protection |
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