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AD6641BCPZRL7-500 Datasheet(PDF) 4 Page - Analog Devices |
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AD6641BCPZRL7-500 Datasheet(HTML) 4 Page - Analog Devices |
4 / 28 page AD6641 Rev. 0 | Page 4 of 28 SPECIFICATIONS DC SPECIFICATIONS AVDD = 1.9 V, DRVDD = 1.9 V, TMIN = −40°C, TMAX = +85°C, fIN = −1.0 dBFS, full scale = 1.5 V, unless otherwise noted. Table 1. AD6641-500 Parameter1 Temp Min Typ Max Unit RESOLUTION 12 Bits ACCURACY No Missing Codes Full Guaranteed Offset Error Full −2.6 0.0 +1.8 mV Gain Error Full −6.8 −2.3 +3.3 % FS Differential Nonlinearity (DNL) Full ±0.5 LSB Integral Nonlinearity (INL) Full ±0.6 LSB TEMPERATURE DRIFT Offset Error Full 18 μV/°C Gain Error Full 0.07 %/°C ANALOG INPUTS (VIN±) Differential Input Voltage Range2 Full 1.18 1.5 1.6 V p-p Input Common-Mode Voltage Full 1.8 V Input Resistance (Differential) Full 1 kΩ Input Capacitance (Differential) 25°C 1.3 pF POWER SUPPLY AVDD Full 1.8 1.9 2.0 V DRVDD Full 1.8 1.9 2.0 V SPI_VDDIO Full 1.8 1.9 3.3 V Supply Currents IAVDD3 Full 300 330 mA IDRVDD3 Full 66 80 mA Power Dissipation3 Full 695 779 mW Power-Down Dissipation Full 15 mW Standby Dissipation Full 72 mW Standby to Power-Up Time Full 10 μs 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and information about how these tests were completed. 2 The input range is programmable through the SPI, and the range specified reflects the nominal values of each setting. See the SPI Register Map section for additional details. 3 IAVDD and IDRVDD are measured with a −1 dBFS, 30 MHz sine input at a rated sample rate. |
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