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ICE2PCS05 Datasheet(PDF) 7 Page - Infineon Technologies AG |
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ICE2PCS05 Datasheet(HTML) 7 Page - Infineon Technologies AG |
7 / 22 page CCM-PFC ICE2PCS05/G Functional Description Version 1.0 7 09 Oct 2008 3.1 General The ICE2PCS05/G is a 8 pin control IC for power factor correction converters. It comes in both DIP and DSO packages and is suitable for wide range line input applications from 85 to 265 VAC. The IC supports converters in boost topology and it operates in continuous conduction mode (CCM) with average current control. The IC operates with a cascaded control; the inner current loop and the outer voltage loop. The inner current loop of the IC controls the sinusoidal profile for the average input current. It uses the dependency of the PWM duty cycle on the line input voltage to determine the corresponding input current. This means the average input current follows the input voltage as long as the device operates in CCM. Under light load condition, depending on the choke inductance, the system may enter into discontinuous conduction mode (DCM). In DCM, the average current waveform will be distorted but the resultant harmonics are still low enough to meet the Class D requirement of IEC 1000- 3-2. The outer voltage loop controls the output bus voltage. Depending on the load condition, OTA1 establishes an appropriate voltage at VCOMP pin which controls the amplitude of the average input current. The IC is equipped with various protection features to ensure safe operating condition for both the system and device. Important protection features are namely Open-Loop protection, Current Limitation and Output Over-voltage Protection. 3.2 Power Supply An internal under voltage lockout (UVLO) block monitors the VCC power supply. As soon as it exceeds 11.8V and the voltage at pin 6 (VSENSE) is >0.6V, the IC begins operating its gate drive and performs its Startup as shown in Figure 3. . Figure 3 State of Operation respect to VCC If VCC drops below 11V, the IC is off. The IC will then be consuming typically 300 µA, whereas consuming 13mA during normal operation. The IC can be turned off and forced into standby mode by pulling down the voltage at pin 6 (VSENSE) to lower than 0.6V. The current consumption is reduced to 300µA in this mode. 3.3 Start-up Figure 4 shows the operation of voltage loop’s OTA1 during startup. The VCOMP pin is pull internally to ground via switch S1 during UVLO and other fault conditions (see later section on “System Protection”). During power up when VOUT is less than 83% of the rated level, OTA1 sources an output current, maximum 30 µA, into the compensation network at pin 5 (VCOMP) causing the voltage at this pin to rise linearly. This results in a controlled linear increase of the input current from 0A thus reducing the stress on the external component. Figure 4 Startup Circuit As VOUT has not reached within 5% from the rated value, VCOMP voltage is level-shifted by the window detect block as shown in Figure 5, to ensure there is fast boost up of the output voltage. When VOUT approaches its rated value, OTA1’s sourcing current drops and the level shift of the window detect block is removed. The normal voltage loop then takes control. V CC (V VSENSE > 0.6 V) 11.8 V 11.0 V t OFF Start Up Open loop/ Standby Normal Operation IC's State OFF Normal Operation (V VSENSE < 0.6 V) (V VSENSE > 0.6 V) VC O M P C5 C4 VS ENSE OT A 1 3V IC E2 PCS0 5 /G protec t R3 + R4 R4 x V OU T ) ( R6 S1 3 Functional Description |
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