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DS1842N+R Datasheet(PDF) 4 Page - Maxim Integrated Products |
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DS1842N+R Datasheet(HTML) 4 Page - Maxim Integrated Products |
4 / 6 page 76V, APD, Bias Output Stage with Current Monitoring 4 _______________________________________________________________________________________ Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) FET ON-RESISTANCE vs. DRAIN CURRENT IDS (mA) 100 10 4 5 6 7 3 1 1000 VGS = 2.5V VGS = 3.0V VGS = 3.6V VGS = 5V VGS = 10V FET DRAIN CURRENT vs. DRAIN VOLTAGE DRAIN VOLTAGE (V) 3 2 1 100 200 300 400 500 600 700 0 04 VGS = 2.5V VGS = 3.0V VGS = 3.6V VGS = 5V VGS = 10V Pin Description PIN NAME FUNCTION 1 MIR1 Current Mirror Monitor Output, 10:1 Ratio 2 MIR2 Current Mirror Monitor Output, 5:1 Ratio 3 N.C. No Connection. Can be connected to GND for compatibility with the DS1842A. 4, 9–12 N.C. No Connection. Not internally connected. 5 CLAMP Clamp Input. Disables the current mirror output (MIROUT). 6 GATE FET Gate Connection 7 GND Ground 8 LX FET Drain Connection. Connect to switching inductor. 13 MIRIN Current Mirror Input 14 MIROUT Current Mirror Output. Connect to APD bias pin. — EP Exposed Pad. Connect to ground. Block Diagram DS1842 LX GATE GND MIRIN MIR1 CLAMP MIROUT CURRENT MIRROR CURRENT LIMIT MIR2 THERMAL SHUTDOWN |
Similar Part No. - DS1842N+R |
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Similar Description - DS1842N+R |
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