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MC68302 Datasheet(PDF) 46 Page - Motorola, Inc |
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MC68302 Datasheet(HTML) 46 Page - Motorola, Inc |
46 / 480 page MC68000/MC68008 Core 2-16 MC68302 USER’S MANUAL MOTOROLA # Modified by the CP after a CP or system reset. ## Tx BD 4, 5, 6, and 7 are not initially available to SCC3. (See 4.5.5 Buffer Descriptors Table for information on how they may be regained.) In addition to the internal dual-port RAM, a number of internal registers support the functions of the various M68000 core peripherals. The internal registers (see Table 2-9) are memory- mapped registers offset from the BAR point1616er and are located on the internal M68000 bus. Base + 580 • • • Base + 5BF SCC2 SCC2 Specific Protocol Parameters Base + 5C0 • • • Base + 5FF Reserved (Not Implemented) Base + 600 Base + 608 Base + 610 Base + 618 Base + 620 Base + 628 Base + 630 Base + 638 Base + 640 Base + 648 Base + 650 Base + 658 Base + 660 Base + 666 Base + 668 Base + 66A Base + 66C Base + 66E # Base +67A Base +67C Base +67E # 4 Word 4 Word 4 Word 4 Word 4 Word 4 Word 4 Word 4 Word 4 Word 4 Word 4 Word 4 Word 3 Word Word Word Word Word 6 Word Word Word Word SCC3 SCC3 SCC3 SCC3 SCC3 SCC3 SCC3 SCC3 SCC3 SCC3 SCC3 SCC3 SMC SCC1 SCC1 SCC2 SCC2 SMC1–SMC2 SCP SCC1–SCC3 CP RxBD0 RxBD1 RxBD2 RxBD3 RxBD4 RxBD5 RxBD6 RxBD7 TxBD0 TxBD1 TxBD2 TxBD3 ## Reserved RxBD TxBD RxBD TxBD Internal Use Rx/TxBD BERR Channel Number MC68302 Revision Number Base + 680 • • • Base + 6BF SCC3 SCC3 Specific Protocol Parameters Base + 6C0 • • • Base + 7FF Reserved (Not Implemented) Table 2-8. Parameter RAM |
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