SAF3560_SDS

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Product short data sheet

Rev. 03 — 15 September 2010

11 of 20

NXP Semiconductors

SAF3560

Terrestrial digital radio processor

[1]

Table 15 defines the pin type.

[1]

Table 15 defines the pin type.

[1]

Table 15 defines the pin type.

Table 11.

Pin description (external host microcontroller interface)

Symbol

Pin

Type[1]

Description

CLKOUT

1

OL

clock output; clock source and clock frequency are

programmable through software

RESET_N

2

IZU-H

master reset input from host microcontroller (active LOW)

I2C2_DA

9

IOZD-H

I2C2_SCL

7

IOZU

I2C2_SDA

8

IOZU

I2C1_DA

5

IOZD-H

I2C1_SCL

3

IOZU

I2C1_SDA

4

IOZU-H

SPI1 interface

SPI1_SCLK

12

IZU-H

serial clock input of first SPI interface

SPI1_SI

11

IZU-H

slave input of first SPI interface

SPI1_SO

10

OL

slave output of first SPI interface

SPI1_SS_N

13

IZU-H

slave select input of first SPI interface (active LOW)

UART interface

UART_CTS

29

IZU

UART clear-to-send signal input

UART_RD

25

IZU

UART receive data input

UART_RTS

26

OH

UART ready-to-send signal output

UART_TD

24

OH

UART transmit data output

Table 12.

Pin description (JTAG interface)

Symbol

Pin

Type[1]

Description

TCK

132

IZU

test clock input

TDI

135

IZU

test serial data input

TDO

136

OL

test serial data output

TMS

133

IZU

test mode select input

TRST_N

131

IZU

test reset input; drive LOW for normal operating

Table 13.

Pin description (crystal oscillator)

Symbol

Pin

Type[1]

Description

XTALI

141

AI

crystal oscillator analog input

XTALO

142

AO

crystal oscillator analog output

Table 14.

Pin description (internally connected pins)

Symbol

Pin

Type

Description

i.c.

41,

43 to 54

-

internally connected; leave open