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Lower-case signal names are internal signals shown to aid understanding of timing.

Fig 9.

Timing for a complete error detection sequence

CLK

LE

OE

002aad208

enter error detect

command

some number of

optional clocks to

clock in 1s for testing

shift halted

load fault

command

shift

resumed

at least 8 clocks

exit error detect

command

SDI

shift_reg[n-1:0]

fault data

fault data MSB

SDO

previous serial data shifting out

this must be min. 2

μs wide

and 3 clocks minimum with

output enable LOW

fault_load

fault_load goes LOW

on this edge of OE

fault_data[n-1:0]

fault data 8 bits

error_detect_mode