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FAN6747 Datasheet(PDF) 7 Page - Fairchild Semiconductor

Part # FAN6747
Description  Control a Flyback Power Supply with Peak Current Output
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN6747 Datasheet(HTML) 7 Page - Fairchild Semiconductor

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AN-6747
APPLICATION NOTE
© 2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.1 • 9/16/10
7
6
BIAS
KA
OPD
O
10
325
CTR
R
V
V
V
×
>
(28)
where VOPD is the drop voltage of photodiode, about 1.2V;
VKA is the minimum cathode to anode voltage of shunt
regulator (2.5V); and CTR is the current transfer rate of the
opto-coupler.
CF
RF
R1
R
2
vFB
C
FB
3R
iD
vO
R
5.2V
RBIAS
RDB
Figure 9.
Feedback Circuit
The feedback compensation network transfer function of
Figure 9 is obtained as:
PC
ZC
I
O
FB
/
s
1
/
s
1
s
ˆ
ˆ
ω
+
ω
+
ω
=
ν
ν
(29)
where
F
DB
1
B
I
C
R
R
R
=
ω
;
()
O
1
F
ZC
C
R
R
1
+
=
ω
;
FB
B
PC
C
R
1
=
ω
RB is the internal feedback bias resistor; and R1, RD, RF, CF,
and C
FB are shown in Figure 9.
(Design Example)
Assuming CTR is 100%;
6
BIAS
KA
OPD
O
10
325
CTR
R
V
V
V
×
>
Ω
=
×
=
×
<
k
87
10
325
5
.
2
2
.
1
32
10
325
V
V
V
R
6
6
KA
OPD
O
BIAS
5.1k
Ω resistor is selected for RDB.
The voltage divider resistors for VO sensing are
selected as 120k
Ω and 10kΩ.
[STEP-11] Design the Startup Circuit
Figure 10 shows the typical startup circuit for FAN6747.
HV pin has an internal high-voltage startup circuit that is
disabled when VDD reaches its turn-on threshold. Since HV
pin is also used to obtain line voltage information for
brownout protection and power limit line compensation, it
is typical to connect the HV pin to the AC line through a
resistor and diode.
A two-stage hold-up capacitor configuration (CDD1 and
CDD2) is typically used to increase the hold-up time while
minimizing startup time. Initially, the FAN6747 HV startup
circuit is enabled before it begins normal switching
operation. Therefore, the current supplied by the HV pin
can charge capacitor CDD1 while supplying the startup
current to FAN6747. When VDD reaches the turn-on voltage
of 16.5V (VDD-ON), FAN6747 begins switching operation and
the HV startup circuit is disabled. Then the current required
by FAN6747 is supplied from the auxiliary winding of
transformer.
It is typical to use a 150~250kΩ resistor for the HV pin to
improve the immunity against line surge.
Figure 10.
Startup Circuit
Leading-Edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-on
spike occurs across the sense resistor, caused by primary-
side capacitance and secondary-side rectifier reverse
recovery. To avoid premature termination of the switching
pulse, a leading-edge blanking time is built in. During this
blanking period (270ns), the PWM comparator is disabled
and cannot switch off the gate driver. Thus, an RC filter
with a small RC time constant is enough for current sensing
(e.g. 100
Ω + 470pF). A non-inductive resistor is
recommended for RCS.


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