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FMS7G15US60 Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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FMS7G15US60 Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 4 page www.fairchildsemi.com © 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com Rev. 1.0.1 • 12/7/06 AN-6041 PCB Layout Considerations for Video Filter / Drivers Power The bulk capacitor (Tantalum or Electrolytic) should be placed reasonably close to the device. If used, a linear regulator for analog VCC should be close to the power area of the device. Use separate analog and digital power planes. Decoupling Capacitors Placement of bypass capacitors is important to maintain proper function. Every supply pin should connect to a ceramic decoupling capacitor. The distance from the device pin should be no greater than 0.1 inches, as shown in Figure 1. Place high-frequency decoupling capacitors as close to the device power supply pin as possible; without series vias between the capacitor and the device pin. This is normally done for the smallest capacitor, closest to the supply pin. Board space does not always allow for all bypass capacitors to be on the same plane; second and third capacitors may need vias to connect to the power supply pin. Figure 1. Decoupling Capacitor Placement Analog GND and Digital GND The ground plane is the most important layer in the PCB layout; it greatly affects the performance of analog components and signals. Proper layout of the ground plane keeps the board noise level within acceptable margins. Avoid long current loops, especially when mixing analog and digital signals. The best way to achieve this is to partition analog and digital ground very carefully and clearly so that signal and return current paths can be localized in their sections. If analog and digital circuitry is partitioned well, there is no need to split the ground. In most cases, a single solid ground plane is the best choice because it keeps ground potential lower between every ground point and helps reduce EMI. In a complex digital intensive design, it may be difficult to keep the analog area free from digital return current. In that case, there may be some benefit from cutting ground between the digital and analog and tying the two together under the device. Avoid any traces running across the split. Input Interface Figure 2 shows a typical AC-coupled input configuration for driving the filter/driver. In this configuration, use a 0.1µF ceramic capacitor to AC couple the input signal. The coupling capacitor and the input termination resistor at the input to the filter/driver should be placed close to the input pin for optimal signal integrity. If the input signal does not go below ground, the clamp is inactive; but if the input signal goes below ground, the clamp circuitry sets the bottom of the sync tip (or lowest voltage) to just below ground. The input level set by the clamp, combined with the internal DC offset, keeps the output signal within acceptable range. This clamp feature allows the input to be directly driven (DC-coupled) by a ground-referenced DAC output. Figure 2. Typical AC-Coupled Input Configuration for Driving the Filter / Driver LPF 0.1µF Buf Input Clamp/ Bias Rterm Termination & Coupling close to device input |
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