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KS8995MA Datasheet(PDF) 76 Page - Micrel Semiconductor |
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KS8995MA Datasheet(HTML) 76 Page - Micrel Semiconductor |
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76 / 79 page  Micrel, Inc. KS8995MA/FQ Semptember 2008 76 M9999-091508 Reset Circuit Diagram Micrel recommends the following discrete reset circuit as shown in Figure 22 when powering up the KS8895MA device. For the application where the reset circuit signal comes from another device (e.g., CPU, FPGA, etc), we recommend the reset circuit as shown in Figure 23. VCC R 10k C 10µF D1 KS8995MA RST D1: 1N4148 Figure 22. Recommended Reset Circuit VCC R 10k D2 C 10µF D1 CPU/FPGA RST_OUT_n KS8995MA RST D1, D2: 1N4148 Figure 23. Recommended Circuit for Interfacing with CPU/FPGA Reset At power-on-reset, R, C, and D1 provide the necessary ramp rise time to reset the Micrel device. The reset out from CPU/FPGA provides warm reset after power up. It is also recommended to power up the VDD core voltage earlier than VDDIO voltage. At worst case, the both VDD core and VDDIO voltages should come up at the same time. |
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