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STK12C68 Datasheet(PDF) 14 Page - Cypress Semiconductor |
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STK12C68 Datasheet(HTML) 14 Page - Cypress Semiconductor |
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14 / 24 page 
STK12C68 Document Number: 001-51027 Rev. *C Page 14 of 24 AutoStore or Power Up RECALL Parameter Alt Description STK12C68 Unit Min Max tHRECALL [13] tRESTORE Power up RECALL Duration 550 μs tSTORE [14, 15, 16] tHLHZ STORE Cycle Duration 10 ms tDELAY [9, 15] tHLQZ , tBLQZ Time Allowed to Complete SRAM Cycle 1 μs VSWITCH Low Voltage Trigger Level 4.0 4.5 V VRESET Low Voltage Reset Level 3.9 V tVCCRISE VCC Rise Time 150 μs tVSBL[11] Low Voltage Trigger (VSWITCH) to HSB Low 300 ns Switching Waveform Figure 11. AutoStore/Power Up RECALL WE Notes 13. tHRECALL starts from the time VCC rises above VSWITCH. 14. CE and OE low for output behavior. 15. CE and OE low and WE high for output behavior. 16. HSB is asserted low for 1us when VCAP drops through VSWITCH. If an SRAM Write has not taken place since the last nonvolatile cycle, HSB is released and no store takes place. [+] Feedback |
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