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LC89977M Datasheet(PDF) 3 Page - Sanyo Semicon Device

Part No. LC89977M
Description  CCD Delay Line for PAL
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Manufacturer  SANYO [Sanyo Semicon Device]
Direct Link  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC89977M Datasheet(HTML) 3 Page - Sanyo Semicon Device

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No. 5545-3/7
LC89977M
CONT
Mode(representative)
Chrominance signal delay (number of CCD stages)
Luminance signal delay (number of CCD stages)
Low
PAL/GBI
2H (1703.5) + 0H (1)
1H (848)
High
4.43NTSC
1H (845.5) + 0H (1)
1H (842)
Control Pin Functions
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Switching voltage level: low
VL
–0.3
0.0
+0.5
V
Switching voltage level: high
VH
2.0
5.0
6.0
V
Switching Voltage Levels
Function of the 3FSC Pin
This pin provides a 3fsc clock signal generated by the 3
× PLL frequency multiplier circuit.
Note: *Since the control pins have built-in pull-down resistors (about 70 k
Ω), leaving these pins opens effectively sets them to the low level.
Continued on next page.
Parameter
Symbol
Switch states
Ratings
Unit
SW1
SW2
SW3
Test conditions
min
typ
max
IDD-1
a
a
b
*1
Supply current
IDD-2
b
a
b
*1
27
32
37
mA
[Chrominance signal characteristics] (with no input to Y-IN)
VINC-1
a
a
b
*2
DC output voltage
VINC-2
b
a
b
*2
1.9
2.4
2.9
V
VOUTC-1
a
a
b
*2
VOUTC-2
b
a
b
*2
1.4
1.9
2.4
V
GVC-1
a
a
b
*3
Voltage gain
GVC-2
b
a
b
*3
–2
0
+2
dB
CD-1
a
a
b
*4
Comb depth
CD-2
b
a
b
*4
–40
–35
dB
LNC-1
a
a
b
*5
Linearity
LNC-2
b
a
b
*5
–0.3
0.0
+0.3
dB
LCK3C-1
a
a
b
*6
Clock leakage (3fsc)
LCK3C-2
b
a
b
*6
10
50
mVrms
LCK1C-1
a
a
b
*6
Clock leakage (fsc)
LCK1C-2
b
a
b
*6
0.5
1.5
mVrms
NC-1
a
a
b
*7
Noise
NC-2
b
a
b
*7
0.5
2.0
mVrms
ZOC-1
a
a
a, b
*8
Output impedance
ZOC-2
b
a
a, b
*8
200
350
500
TDC-1
a
a
b
*9
0-H delay time
TDC-2
b
a
b
*9
130
ns
Electrical Characteristics at VDD = 5.0 V, Ta = 25°C, FCLK = 4.43361875 MHz, VCLK = 500 mVp-p


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