CY7C1041CV33 Automotive

Document Number: 001-67307 Rev. **

Page 7 of 17

Switching Characteristics

Over the Operating Range [4]

Parameter

Description

-10

-12

-20

Unit

Min

Max

Min

Max

Min

Max

Read Cycle

100

–

100

–

100

–

s

Read Cycle Time

10

–

12

–

20

–

ns

Address to Data Valid

–

10

–

12

–

20

ns

Data Hold from Address Change

3

–

3

–

3

–

ns

CE LOW to Data Valid

–

10

–

12

–

20

ns

OE LOW to Data Valid

Auto-A

–5–

6–8

ns

Auto-E

–––

7–8

OE LOW to Low Z[6]

0–0

–0–

ns

OE HIGH to High Z[6, 7]

–5–

6–8

ns

CE LOW to Low Z[6]

3–3

–3–

ns

CE HIGH to High Z[6, 7]

–5–

6–8

ns

CE LOW to Power Up

0–0

–0–

ns

CE HIGH to Power Down

–

10

–

12

–

20

ns

Byte Enable to Data Valid

Auto-A

–

5

–

6

–

8

ns

Auto-E

–––

7–8

Byte Enable to Low Z

0

–

0

–

0

–

ns

Byte Disable to High Z

–

6

–

6

–

8

ns

Write Cycle[8, 9]

Write Cycle Time

10

–

12

–

20

–

ns

CE LOW to Write End

7

–

8

–

10

–

ns

Address Setup to Write End

7

–

8

–

10

–

ns

Address Hold from Write End

0

–

0

–

0

–

ns

Address Setup to Write Start

0

–

0

–

0

–

ns

WE Pulse Width

7

–

8

–10–

ns

Data Setup to Write End

5–6

–8–

ns

Data Hold from Write End

0

–

0

–

0

–

ns

WE HIGH to Low Z[6]

3–3

–3–

ns

WE LOW to High Z[6, 7]

–5–

6–8

ns

Byte Enable to End of Write

7

–

8

–

10

–

ns

Notes

4. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5 V, and input pulse levels of 0 to 3.0 V.

voltage.

8. The internal write time of the memory is defined by the overlap of CE LOW, WE LOW, and BHE/BLE LOW. CE, WE, and BHE/BLE must be LOW to initiate a write.

The transition of these signals terminate the write. The input data setup and hold timing is referenced to the leading edge of the signal that terminates the write.

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