LC872H08A/06A/04A

No.A1540-4/28

System Clock Divider Function

• Can run on low current.

• The minimum instruction cycle selectable from 300ns, 600ns, 1.2μs, 2.4μs, 4.8μs, 9.6μs, 19.2μs, 38.4μs, and

76.8

μs (at a main clock rate of 10MHz).

Internal Reset Function

• Power-on reset (POR) function

1) POR reset is generated only at power-on time.

2) The POR release level can be selected from 8 levels (1.67V, 1.97V, 2.07V, 2.37V, 2.57V, 2.87V, 3.86V, and

4.35V) through option configuration.

• Low-voltage detection reset (LVD) function

1) LVD and POR functions are combined to generate resets when power is turned on and when power voltage falls

below a certain level.

2) The use/disuse of the LVD function and the low voltage threshold level (7 levels: 1.91V, 2.01V, 2.31V, 2.51V,

2.81V, 3.79V, 4.28V).

Standby Function

• HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.

1) Oscillation is not halted automatically.

2) There are three ways of resetting the HALT mode.

(1) Setting the reset pin to the low level

(2) System resetting by watchdog timer or low-voltage detection

(3) Occurrence of an interrupt

• HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.

1) The CF, RC and crystal oscillators automatically stop operation.

2) There are four ways of resetting the HOLD mode.

(1) Setting the reset pin to the lower level.

(2) System resetting by watchdog timer or low-voltage detection

(3) Having an interrupt source established at either INT0, INT1, INT2, INT4 or INT5

* INT0 and INT1 HOLD mode reset is available only when level detection is set.

(4) Having an interrupt source established at port 0.

• X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer.

1) The CF and RC oscillator automatically stop operation.

2) The state of crystal oscillation established when the X'tal HOLD mode is entered is retained.

3) There are five ways of resetting the X'tal HOLD mode.

(1) Setting the reset pin to the low level.

(2) System resetting by watchdog timer or low-voltage detection.

(3) Having an interrupt source established at either INT0, INT1, INT2, INT4 or INT5

* INT0 and INT1 HOLD mode reset is available only when level detection is set.

(4) Having an interrupt source established at port 0.

(5) Having an interrupt source established in the base timer circuit.

Note: Available only when X’tal oscillation is selected.

Package Form

• QFP36 (7×7): Lead-free type

Development Tools

• On-chip-debugger : TCB87 TypeB + LC87D2H08A

: TCB87 TypeB + LC87F2H08A

: TCB87 TypeC (3 wire version) + LC87D2H08A

: TCB87 TypeC (3 wire version) + LC87F2H08A

Note: LC87F2H08A has an On-chip debugger but its function is limited.

Flash ROM Version

• LC87F2H08A