Pin Descriptions

Pin No

Pin name

Input/Output

Functions

90

92

Power supply

83

86

V1

LCD drive level power supply

85

V3

Power supply

84

V4

V3 and V4 : Nonselect level

97

CP

Input

Display data shift clock (triggering on the trailing edge)

81

CDR

Input/Output

Chip disable pin

100

CDL

Input/Output

H level : Data not accepted

L level : Data accepted

99

LOAD

Input

Display data latch clock (triggering on the trailing edge). On the trailing

edge, output levels switch in response to the particular combination of

display data, M and DISP OFF signals.

93

DI4

Input

94

DI3

95

DI2

96

DI1

88

M

Input

LCD drive output alternating signal

91

R/L

Input

Input pin which performs input/output switching for CDR and CDL pins and

directional shift for 4-bit parallel input data.

1

O1

Output

LCD drive output

2

O2

The combination of display data, M signal, and DISP OFF signal can be used

to create output levels as shown below.

79

O79

80

O80

89

DISP OFF

Input

Input pin which controls output pins O1 to O80. V1 level is output from O1 to

O80 pin output during the low level input interval (See logic table).

R/L

Input data and latch address

L

H

M

Q

DISP OFF

Output

L

L

H

V3

L

H

H

V1

H

L

H

V4

H

H

H

*

*

L

V1

LC79400D

No. 4346-4/8

*Don’t care

(To be set to either "H" or "L")

Pin Name

Input/Output

R/L

Pin Description

CDR

Input

L

Control input pin for the IC’s internal disable F/F.

CDL

Output

Output pin of the IC’s internal disable F/F.

Connects to the next stage CDR pin when

establishing a cascade connection.

CDL

Input

H

Control input pin for the IC’s internal disable F/F.

CDR

Output

Output pin of the IC’s internal disable F/F.

Connects to the next stage CDL pin when

establishing a cascade connection.