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CYDC128B16 Datasheet(PDF) 9 Page - Cypress Semiconductor |
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CYDC128B16 Datasheet(HTML) 9 Page - Cypress Semiconductor |
9 / 29 page CYDC128B16 Document #: 001-01638 Rev. *H Page 9 of 29 Table 3. Input Read Register Operation[1, 2] SFEN CE R/W OE UB LB ADDR I/O0–I/O1 I/O2–I/O15 Mode HLHL L L x0000-Max VALID[3] VALID[3] Standard memory access L L H L X L x0000 VALID[4] X IRR read 1. SFEN = VIL for IRR reads. 2. SFEN active when either CEL = VIL or CER = VIL. It is inactive when CEL = CER = VIH. 3. UB or LB = VIL. If LB = VIL, then DQ<7:0> are valid. If UB = VIL then DQ<15:8> are valid. 4. LB must be active (LB = VIL) for these bits to be valid. Table 4. Output Drive Register [1] SFEN CE R/W OE UB LB ADDR I/O0–I/O4 I/O5–I/O15 Mode HLH X[2] L[3] L[3] x0000-Max VALID[3] VALID[3] Standard memory access LL L X X L x0001 VALID[4] X ODR write[1, 3] LL H L X L x0001 VALID[4] X ODR read[1] 1. SFEN = VIL for ODR reads and writes. 2. Output enable must be low (OE = VIL) during reads for valid data to be output. 3. During ODR writes data will also be written to the memory. Table 5. Semaphore Operation Example Function I/O0–I/O15 Left I/O0–I/O15 Right Status No action 1 1 Semaphore-free Left port writes 0 to semaphore 0 1 Left port has semaphore token Right port writes 0 to semaphore 0 1 No change. Right side has no write access to semaphore Left port writes 1 to semaphore 1 0 Right port obtains semaphore token Left port writes 0 to semaphore 1 0 No change. Left port has no write access to semaphore Right port writes 1 to semaphore 0 1 Left port obtains semaphore token Left port writes 1 to semaphore 1 1 Semaphore-free Right port writes 0 to semaphore 1 0 Right port has semaphore token Right port writes 1 to semaphore 1 1 Semaphore free Left port writes 0 to semaphore 0 1 Left port has semaphore token Left port writes 1 to semaphore 1 1 Semaphore-free [+] Feedback |
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