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CY62256NLL-70SNXA Datasheet(PDF) 5 Page - Cypress Semiconductor |
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CY62256NLL-70SNXA Datasheet(HTML) 5 Page - Cypress Semiconductor |
5 / 14 page CY62256N Document Number: 001-06511 Rev. *D Page 5 of 14 Thermal Resistance Parameter[7] Description Test Conditions DIP SOIC TSOP RTSOP Unit JA Thermal resistance (junction to ambient) Still air, soldered on a 4.25 × 1.125 inch, 4-layer printed circuit board 75.61 76.56 93.89 93.89 C/W JC Thermal resistance (junction to case) 43.12 36.07 24.64 24.64 C/W Figure 3. AC Test Loads and Waveforms Data Retention Characteristics Parameter Description Conditions[8] Min Typ[9] Max Unit VDR VCC for data retention 2.0 – – V ICCDR Data retention current LL - Commercial VCC = 2.0V, CE > VCC 0.3V, VIN > VCC 0.3V, or VIN < 0.3V –0.1 5 A LL - Industrial/Auto-A – 0.1 10 A LL - Auto-E – 0.1 10 A tCDR[7] Chip deselect to data retention time 0 – – ns tR[7] Operation recovery time tRC –– ns 3.0 V 5 V OUTPUT R1 1800 R2 990 100 pF INCLUDING JIG AND SCOPE GND 90% 10% 90% 10% <5 ns <5 ns 5 V OUTPUT R1 1800 R2 990 5pF INCLUDING JIG AND SCOPE (a) (b) OUTPUT 1.77 V Equivalent to: THÉVENIN EQUIVALENT ALL INPUT PULSES 639 Notes 7. Tested initially and after any design or process changes that may affect these parameters. 8. No input may exceed VCC + 0.5 V. 9. Typical specifications are the mean values measured over a large sample size across normal production process variations and are taken at nominal conditions (TA = 25 °C, VCC). Parameters are guaranteed by design and characterization, and not 100% tested. Figure 4. Data Retention Waveform 3.0 V 3.0 V tCDR VDR > 2 V DATA RETENTION MODE tR CE VCC [+] Feedback |
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