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CY62177EV30LL Datasheet(PDF) 4 Page - Cypress Semiconductor |
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CY62177EV30LL Datasheet(HTML) 4 Page - Cypress Semiconductor |
4 / 14 page CY62177EV30 MoBL® Document Number: 001-09880 Rev. *G Page 4 of 14 Maximum Ratings Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested. Storage temperature ................................ –65 °C to +150 °C Ambient temperature with power applied ........................................... –55 °C to +125 °C Supply voltage to ground potential ........................................–0.3 V to VCC(max) + 0.3 V DC voltage applied to outputs in High Z state [5, 6] .......................–0.3 V to VCC(max) + 0.3 V DC input voltage [5, 6].................... –0.3 V to VCC(max) + 0.3 V Output current into outputs (LOW) ............................. 20 mA Static discharge voltage.......................................... > 2001 V (per MIL-STD-883, method 3015) Latch up current...................................................... > 200 mA Operating Range Device Range Ambient Temperature VCC[7] CY62177EV30LL Industrial –40 °C to +85 °C 2.2 V to 3.7 V Electrical Characteristics Over the Operating Range Parameter Description Test Conditions 55 ns Unit Min Typ[8] Max VOH Output HIGH voltage IOH = –0.1 mA VCC = 2.20 V 2.0 – – V IOH = –1.0 mA VCC = 2.70 V 2.4 – – V VOL Output LOW voltage IOL = 0.1 mA VCC = 2.20 V – – 0.4 V IOL = 2.1 mA VCC = 2.70 V – – 0.4 V VIH Input HIGH voltage VCC = 2.2 V to 2.7 V 1.8 – VCC + 0.3 V V VCC= 2.7 V to 3.7 V 2.2 – VCC + 0.3 V V VIL Input LOW voltage VCC = 2.2 V to 2.7 V –0.3 – 0.6 V VCC= 2.7 V to 3.7 V –0.3 – 0.7[9] V IIX Input leakage current GND < VI < VCC –1 – +1 A IOZ Output leakage current GND < VO < VCC, Output Disabled –1 – +1 A ICC VCC operating supply current f = fMax = 1/tRC VCC = VCC(max) IOUT = 0 mA CMOS levels –35 45 mA f = 1 MHz – 4.5 5.5 mA ISB2 [10, 11] Automatic CE power down current—CMOS inputs CE1 > VCC – 0.2 V or CE2 < 0.2 V or (BHE and BLE) > VCC – 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V, f = 0, VCC = 3.7 V –3 25 A Capacitance Parameter[12] Description Test Conditions Max Unit CIN Input capacitance TA = 25 °C, f = 1 MHz, VCC = VCC(typ) 15 pF COUT Output capacitance 15 pF Notes 5. VIL(min) = –2.0 V for pulse durations less than 20 ns. 6. VIH(max) = VCC + 0.75 V for pulse durations less than 20 ns. 7. Full Device AC operation assumes a 100 s ramp time from 0 to VCC (min) and 200 s wait time after VCC stabilization. 8. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. 9. Under DC conditions the device meets a VIL of 0.8 V. However, in dynamic conditions Input LOW Voltage applied to the device must not be higher than 0.7 V. 10. The BYTE pin in the 48-TSOP I package has to be tied to VCC to use the device as a 2 M × 16 SRAM. The 48-TSOP I package can also be used as a 4 M × 8 SRAM by tying the BYTE signal to VSS. In the 4 M × 8 configuration, Pin 45 is A21, while BHE, BLE, and I/O8 to I/O14 pins are not used. 11. Chip enables (CE1 and CE2) and Byte Enables (BHE and BLE) need to be tied to CMOS levels to meet the ISB2 / ICCDR spec. Other inputs can be left floating. 12. Tested initially and after any design or process changes that may affect these parameters. [+] Feedback |
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