No. 5826-9/9

LC78632RE

This catalog provide information as of December, 1997. Specifications and information herein are subject to

change without notice.

s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace

equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of

which may directly or indirectly cause injury, death or property loss.

s Anyone purchasing any products described or contained herein for an above-mentioned use shall:

ΠAccept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and

distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all

damages, cost and expenses associated with such use:

 Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on

SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees

jointly or severally.

s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for

volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied

regarding its use or any infringements of intellectual property rights or other rights of third parties.

Continued from preceding page.

Note:

Of the general-purpose I/O ports, any unused input ports must be connected to 0 V, or set to be output ports.

Pin No.

Symbol

I/O

Function

51

Crystal oscillator ground. Must be connected to 0 V.

52

O

16.9344 MHz crystal oscillator connections. Use a 33.8688 MHz crystal oscillator for quad-speed playback.

53

I

54

Crystal oscillator power supply

55

Right channel ground. Must be connected to 0 V.

56

RCHN

O

One-bit D/A

Right channel N output

57

RCHP

O

converter pins

Right channel P output

58

Right channel power supply

59

MUTER

O

Right channel mute output

60

SBSY

O

Subcode block synchronization signal output

61

EFLG

O

C1 and C2 error correction state monitor

62

PW

O

Subcode P, Q, R, S, T, U, V, and W output

63

SFSY

O

Subcode frame synchronization signal output. Falls when the subcode output goes to the standby state.

64

SBCK

I

Subcode readout clock input. This is a Schmitt input. This pin must be connected to 0 V if unused.

65

DOUT

O

Digital output

66

FSX

O

Outputs a 7.35 kHz synchronization signal generated by dividing the crystal oscillator frequency.

67

WRQ

O

Subcode Q output standby output

68

RWC

I

Read/write control input

69

SQOUT

O

Subcode Q output

70

COIN

I

Input for commands from the control microprocessor

71

CQCK

I

Command input acquisition clock. Also used as the SQOUT subcode readout clock input. This is a Schmitt input.

72

RES

I

Chip reset input. This pin must be set low temporarily when power is first applied.

73

TESTF

O

Test output

74

CONT2

O

Output port

75

16M

O

16.9344 MHz output

76

4.2M

O

4.2336 MHz output

77

TEST5

I

Test input. A pull-down resistor is built in. Must be connected to 0 V.

78

CS

I

Chip select input. A pull-down resistor is built in. When control is not used, this pin must be connected to 0 V.

79

DEFI

I

Defect detection signal input. Must be connected to 0 V if unused.

80

VCOC

I

Test input. Must be connected to 0 V.