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CY8C27643-24LTXI Datasheet(PDF) 9 Page - Cypress Semiconductor |
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CY8C27643-24LTXI Datasheet(HTML) 9 Page - Cypress Semiconductor |
9 / 63 page CY8C27143, CY8C27243 CY8C27443, CY8C27543 CY8C27643 Document Number: 38-12012 Rev. *T Page 9 of 63 Pinouts The CY8C27x43 PSoC device is available in a variety of packages which are listed and illustrated in the following tables. Every port pin (labeled with a “P”) is capable of Digital I/O. However, Vss, VDD, SMP, and XRES are not capable of Digital I/O. 8-pin Part Pinout 20-pin Part Pinout Note 3. These are the ISSP pins, which are not High Z at POR (Power On Reset). See the PSoC Programmable System-on-Chip Technical Reference Manual for details. Table 2. Pin Definitions – 8-pin PDIP Pin No. Type Pin Name Description Figure 3. CY8C27143 8-pin PSoC Device Digital Analog 1 I/O I/O P0[5] Analog column mux input and column output 2 I/O I/O P0[3] Analog column mux input and column output 3 I/O P1[1] Crystal Input (XTALin), I2C serial clock (SCL), ISSP-SCLK[3] 4 Power Vss Ground connection. 5 I/O P1[0] Crystal output (XTALout), I2C serial data (SDA), ISSP-SDATA[3] 6 I/O I/O P0[2] Analog column mux input and column output 7 I/O I/O P0[4] Analog column mux input and column output 8 Power VDD Supply voltage LEGEND: A = Analog, I = Input, and O = Output. PDIP 1 2 3 4 A, IO, P0[5] A, IO, P0[3] I2CSCL, XTALin, P1[1] VSS 8 7 6 5 VDD P0[4], A, IO P0[2], A, IO P1[0], XTALout, I2CSDA Table 3. Pin Definitions – 20-pin SSOP, SOIC Pin No. Type Pin Name Description Figure 4. CY8C27243 20-pin PSoC Device Digital Analog 1 I/O I P0[7] Analog column mux input 2 I/O I/O P0[5] Analog column mux input and column output 3 I/O I/O P0[3] Analog column mux input and column output 4 I/O I P0[1] Analog column mux input 5 Power SMP Switch Mode Pump (SMP) connection to external components required 6 I/O P1[7] I2C Serial Clock (SCL) 7 I/O P1[5] I2C Serial Data (SDA) 8 I/O P1[3] 9 I/O P1[1] Crystal input (XTALin), I2C SCL, ISSP-SCLK[3] 10 Power Vss Ground connection. 11 I/O P1[0] Crystal output (XTALout), I2C SDA, ISSP-SDATA[3] 12 I/O P1[2] 13 I/O P1[4] Optional external clock input (EXTCLK) 14 I/O P1[6] 15 Input XRES Active high external reset with internal pull down 16 I/O I P0[0] Analog column mux input 17 I/O I/O P0[2] Analog column mux input and column output 18 I/O I/O P0[4] Analog column mux input and column output 19 I/O I P0[6] Analog column mux input 20 Power VDD Supply voltage LEGEND: A = Analog, I = Input, and O = Output. SSOP SOIC VDD P0[6], A, I P0[4], A, IO P0[2], A, IO P0[0], A, I XRES P1[6] P1[4], EXTCLK P1[2] P1[0], XTALout, I2C SDA 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 A, I, P0[7] A, IO, P0[5] A, IO, P0[3] A, I, P0[1] SMP I2CSCL, P1[7] I2CSDA, P1[5] P1[3] I2CSCL, XTALin, P1[1] VSS [+] Feedback |
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