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CY7C11461KV18 Datasheet(PDF) 21 Page - Cypress Semiconductor

Part No. CY7C11461KV18
Description  18-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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CY7C11461KV18 Datasheet(HTML) 21 Page - Cypress Semiconductor

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CY7C11461KV18, CY7C11571KV18
CY7C11481KV18, CY7C11501KV18
Document Number: 001-53198 Rev. *F
Page 21 of 29
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature ............................... –65 °C to +150 °C
Ambient Temperature with Power Applied –55 °C to +125 °C
Supply Voltage on VDD Relative to GND ........–0.5V to +2.9V
Supply Voltage on VDDQ Relative to GND.......–0.5V to +VDD
DC Applied to Outputs in High-Z .........–0.5V to VDDQ + 0.3V
DC Input Voltage[12]............................... –0.5V to VDD + 0.3V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage (MIL-STD-883, M 3015).... >2001V
Latch up Current..................................................... >200 mA
Electrical Characteristics
Operating Range
Range
Ambient
Temperature (TA)
VDD[16]
VDDQ[16]
Commercial
0°C to +70°C
1.8 ± 0.1V
1.4V to
VDD
Industrial
–40°C to +85°C
Neutron Soft Error Immunity
Parameter
Description
Test
Conditions Typ Max* Unit
LSBU
Logical
Single-Bit
Upsets
25 °C
197
216
FIT/
Mb
LMBU
Logical
Multi-Bit
Upsets
25 °C
0
0.01
FIT/
Mb
SEL
Single Event
Latch up
85 °C
0
0.1
FIT/
Dev
* No LMBU or SEL events occurred during testing; this column represents a
statistical
2, 95% confidence limit calculation. For more details refer to Appli-
cation Note AN 54908 “Accelerated Neutron SER Testing and Calculation of
Terrestrial Failure Rates”
DC Electrical Characteristics
Over the Operating Range[13]
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
VDD
Power Supply Voltage
1.7
1.8
1.9
V
VDDQ
I/O Supply Voltage
1.4
1.5
VDD
V
VOH
Output HIGH Voltage
Note 17
VDDQ/2 – 0.12
VDDQ/2 + 0.12
V
VOL
Output LOW Voltage
Note 18
VDDQ/2 – 0.12
VDDQ/2 + 0.12
V
VOH(LOW)
Output HIGH Voltage
IOH =0.1 mA, Nominal Impedance
VDDQ – 0.2
VDDQ
V
VOL(LOW)
Output LOW Voltage
IOL = 0.1 mA, Nominal Impedance
VSS
0.2
V
VIH
Input HIGH Voltage
VREF + 0.1
VDDQ + 0.15
V
VIL
Input LOW Voltage
–0.15
VREF – 0.1
V
IX
Input Leakage Current
GND
 VI  VDDQ
2
2
A
IOZ
Output Leakage Current
GND
 VI  VDDQ, Output Disabled
2
2
A
VREF
Input Reference Voltage[19] Typical Value = 0.75V
0.68
0.75
0.95
V
Notes
16. Power up: assumes a linear ramp from 0V to VDD(min) within 200 ms. During this time VIH < VDD and VDDQ < VDD.
17. Outputs are impedance controlled. IOH = –(VDDQ/2)/(RQ/5) for values of 175 < RQ < 350.
18. Outputs are impedance controlled. IOL = (VDDQ/2)/(RQ/5) for values of 175 < RQ < 350.
19. VREF(min) = 0.68V or 0.46VDDQ, whichever is larger, VREF(max) = 0.95V or 0.54VDDQ, whichever is smaller.
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