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CY7C11461KV18 Datasheet(PDF) 12 Page - Cypress Semiconductor

Part No. CY7C11461KV18
Description  18-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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CY7C11461KV18 Datasheet(HTML) 12 Page - Cypress Semiconductor

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CY7C11461KV18, CY7C11571KV18
CY7C11481KV18, CY7C11501KV18
Document Number: 001-53198 Rev. *F
Page 12 of 29
Table 5. Write Cycle Descriptions
The write cycle description table for CY7C11571KV18 follows.[3, 9]
BWS0
K
K
Comments
L
L–H
During the data portion of a write sequence, the single byte (D[8:0]) is written into the device.
L
L–H
During the data portion of a write sequence, the single byte (D[8:0]) is written into the device.
H
L–H
No data is written into the device during this portion of a write operation.
H
L–H
No data is written into the device during this portion of a write operation.
Table 6. Write Cycle Descriptions
The write cycle description table for CY7C11501KV18 follows.[3, 9]
BWS0 BWS1 BWS2 BWS3
K
K
Comments
LLLL
L–H
During the data portion of a write sequence, all four bytes (D[35:0]) are written into
the device.
LLLL
L–H During the data portion of a write sequence, all four bytes (D[35:0]) are written into
the device.
L
H
H
H
L–H
During the data portion of a write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] remains unaltered.
L
H
H
H
L–H During the data portion of a write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] remains unaltered.
H
L
H
H
L–H
During the data portion of a write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] remains unaltered.
H
L
H
H
L–H During the data portion of a write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] remains unaltered.
H
H
L
H
L–H
During the data portion of a write sequence, only the byte (D[26:18]) is written into
the device. D[17:0] and D[35:27] remains unaltered.
H
H
L
H
L–H During the data portion of a write sequence, only the byte (D[26:18]) is written into
the device. D[17:0] and D[35:27] remains unaltered.
H
H
H
L
L–H
During the data portion of a write sequence, only the byte (D[35:27]) is written into
the device. D[26:0] remains unaltered.
H
H
H
L
L–H During the data portion of a write sequence, only the byte (D[35:27]) is written into
the device. D[26:0] remains unaltered.
HHHH
L–H
No data is written into the device during this portion of a write operation.
HHHH
L–H No data is written into the device during this portion of a write operation.
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