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CY7C1312CV18 Datasheet(PDF) 2 Page - Cypress Semiconductor

Part # CY7C1312CV18
Description  18-Mbit QDR짰 II SRAM 2-Word Burst Architecture
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1312CV18 Datasheet(HTML) 2 Page - Cypress Semiconductor

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CY7C1312CV18
CY7C1314CV18
Document #: 001-07164 Rev. *H
Page 2 of 26
Logic Block Diagram (CY7C1312CV18)
Logic Block Diagram (CY7C1314CV18)
CLK
A(18:0)
Gen.
K
K
Control
Logic
Address
Register
D[17:0]
Read Data Reg.
RPS
WPS
Control
Logic
Address
Register
Reg.
Reg.
Reg.
18
19
36
18
BWS[1:0]
VREF
Write
Reg
18
A(18:0)
19
CQ
CQ
DOFF
Q[17:0]
18
18
18
Write
Reg
C
C
CLK
A(17:0)
Gen.
K
K
Control
Logic
Address
Register
D[35:0]
Read Data Reg.
RPS
WPS
Control
Logic
Address
Register
Reg.
Reg.
Reg.
36
18
72
36
BWS[3:0]
VREF
Write
Reg
36
A(17:0)
18
CQ
CQ
DOFF
Q[35:0]
36
36
36
Write
Reg
C
C
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