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CY7C1311CV18-250BZC Datasheet(PDF) 10 Page - Cypress Semiconductor |
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CY7C1311CV18-250BZC Datasheet(HTML) 10 Page - Cypress Semiconductor |
10 / 29 page CY7C1313CV18 CY7C1315CV18 Document Number: 001-07165 Rev. *G Page 10 of 29 Write Cycle Descriptions The write cycle description table for CY7C1313CV18 follows. [2, 10] BWS0 BWS1 K K Comments L L L–H – During the data portion of a write sequence Both bytes (D[17:0]) are written into the device. L L – L-H During the data portion of a write sequence Both bytes (D[17:0]) are written into the device. L H L–H – During the data portion of a write sequence Only the lower byte (D[8:0]) is written into the device, D[17:9] remains unaltered. L H – L–H During the data portion of a write sequence Only the lower byte (D[8:0]) is written into the device, D[17:9] remains unaltered. H L L–H – During the data portion of a write sequence Only the upper byte (D[17:9]) is written into the device, D[8:0] remains unaltered. H L – L–H During the data portion of a write sequence Only the upper byte (D[17:9]) is written into the device, D[8:0] remains unaltered. H H L–H – No data is written into the devices during this portion of a write operation. H H – L–H No data is written into the devices during this portion of a write operation. Note 10. Is based on a write cycle that was initiated in accordance with the Write Cycle Descriptions table. NWS0, NWS1, BWS0, BWS1, BWS2, and BWS3 can be altered on different portions of a write cycle, as long as the setup and hold requirements are achieved. [+] Feedback |
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