CY7C1046DV33

4-Mbit (1 M × 4) Static RAM

Cypress Semiconductor Corporation

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198 Champion Court

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San Jose

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408-943-2600

Document Number: 38-05611 Rev. *D

Revised December 2, 2010

4-Mbit (1 M × 4) Static RAM

Features

Functional Description

The CY7C1046DV33[1] is a high-performance CMOS static

RAM organized as 1M words by 4 bits. Easy memory

expansion is provided by an active LOW Chip Enable (CE), an

active LOW Output Enable (OE), and tri-state drivers. Writing

to the device is accomplished by taking Chip Enable (CE) and

Reading from the device is accomplished by taking Chip

Enable (CE) and Output Enable (OE) LOW while forcing Write

Enable (WE) HIGH. Under these conditions, the contents of

the memory location specified by the address pins will appear

on the I/O pins.

high-impedance state when the device is deselected (CE

HIGH), the outputs are disabled (OE HIGH), or during a Write

operation (CE LOW, and WE LOW).

The CY7C1046DV33 is available in a standard 400-mil-wide

32-pin SOJ package with center power and ground

(revolutionary) pinout.

Logic Block Diagram

COLUMN

DECODER

INPUT BUFFER

POWER

DOWN

WE

OE

1 Mbit x 4

CE

Note

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