CY7C1020CV26

512 Kb (32 K × 16) Static RAM

Cypress Semiconductor Corporation

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198 Champion Court

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San Jose

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408-943-2600

Document #: 38-05406 Rev. *C

Revised December 14, 2010

Features

Functional Description

The CY7C1020CV26 is a high performance CMOS static RAM

organized as 32,768 words by 16 bits. This device has an

automatic power down feature that significantly reduces power

consumption when deselected.

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable

Reading from the device is accomplished by taking Chip

Enable (CE) and Output Enable (OE) LOW while forcing the

Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,

then data from the memory location specified by the address

the Truth Table on page 7 for a complete description of read

and write modes.

impedance state when the device is deselected (CE HIGH),

the outputs are disabled (OE HIGH), the BHE and BLE are

disabled (BHE, BLE HIGH), or during a write operation (CE

LOW, and WE LOW).

The CY7C1020CV26 is available in a standard 44-pin TSOP

Type II.

Logic Block Diagram

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