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LC74793 Datasheet(PDF) 11 Page - Sanyo Semicon Device |
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LC74793 Datasheet(HTML) 11 Page - Sanyo Semicon Device |
11 / 24 page No. 5966-11/24 LC74793, 74793JM Command 3 (Synchronizing signal detection command 1) • First byte DA 0 to 7 Register Contents Notes Status Function 7 — 1 First byte identification bit 6 — 1 Command 3 identification code. 5 — 1 Synchronizing signal detection settings 1. 4 — 1 3 — 0 2 — 0 1 — 1 0 — 1 • Second byte DA 0 to 7 Register Contents Notes Status Function 7 — 0 Second byte identification bit 6 RN2 0 1 5 RN1 0 1 4 RN0 0 1 3 SN3 0 1 2 SN2 0 1 1 SN1 0 1 0 SN0 0 1 RN2 RN1 RN0 Number of HSYNC detections 0 0 0 0 (32) 0 0 1 4 (64) 0 1 0 8 (128) 1 0 0 16 (256) External synchronizing signal detection control. Signal absent → present discrimination. Sets the sampling period during which SYNC is continuously detected in the horizontal synchronizing signal period (1H). Values in parentheses apply when RNE0 (COM4) is set to 1. External synchronizing signal detection control. Signal present → absent discrimination. Sets the sampling period during which SYNC cannot be detected consecutively in the horizontal synchronizing signal period (1H). SN3 SN2 SN1 SNO Number of HSYNC detections 0 0 0 0 No detection performed 0 0 0 1 32 0 0 1 0 64 0 1 0 0 128 1 0 0 0 256 Note: All registers are cleared to 0 when the IC is reset by the RST pin. |
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