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ISL78302 Datasheet(PDF) 3 Page - Intersil Corporation |
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ISL78302 Datasheet(HTML) 3 Page - Intersil Corporation |
3 / 11 page ISL78302 3 FN7696.0 January 28, 2011 Pin Descriptions PIN NUMBER PIN NAME TYPE DESCRIPTION 1 VIN Analog I/O Supply Voltage/LDO Input. Connect a 1µF capacitor to GND. 2 EN1 Low Voltage Compatible CMOS Input LDO-1 Enable. ENABLE = HIGH 3 EN2 Low Voltage Compatible CMOS Input LDO-2 Enable. ENABLE = HIGH 4 CBYP Analog I/O Reference Bypass Capacitor Pin. Recommended to connect capacitor of value 0.01µF between this pin and GND for optimum noise and PSRR performance. 5 CPOR Analog I/O POR2 Delay Setting Capacitor Pin. Connect a capacitor between this pin and GND to delay the POR2 output release after LDO-2 output reaches 94% of its specified voltage level. (200ms delay per 0.01µF). 6 GND Ground GND is the connection to system ground. Connect to PCB Ground plane. 7POR1 Open Drain Output (1mA) Open-drain POR Output for LDO-1 (active-low). Internally connected to VO1 through 100k Ω resistor. 8POR2 Open Drain Output (1mA) Open-drain POR Output for LDO-2 (active-low). Internally connected to VO2 through 100k Ω resistor. 9VO2 Analog I/O LDO-2 Output. Connect capacitor of value 1µF to 10µF to GND (1µF recommended). 10 VO1 Analog I/O LDO-1 Output. Connect capacitor of value 1µF to 10µF to GND (1µF recommended). Ordering Information PART NUMBER (Notes 1, 3, 4) PART MARKING VO1 VOLTAGE (V) (Note 2) VO2 VOLTAGE (V) (Note 2) TEMP RANGE (°C) PACKAGE (Pb-Free) PKG DWG. # ISL78302ARFBZ DNAB 2.5 1.5 -40 to +105 10 Ld 3x3 DFN L10.3x3C Coming Soon ISL78302ARBFZ DNAC 1.5 2.5 -40 to +105 10 Ld 3x3 DFN L10.3x3C Coming Soon ISL78302ARNBZ DNAD 3.3 1.5 -40 to +105 10 Ld 3x3 DFN L10.3x3C Coming Soon ISL78302ARBNZ DNAE 1.5 3.3 -40 to +105 10 Ld 3x3 DFN L10.3x3C Coming Soon ISL78302ARNWZ DNAF 3.3 1.2 -40 to +105 10 Ld 3x3 DFN L10.3x3C Coming Soon ISL78302ARWCZ DNAG 1.2 1.8 -40 to +105 10 Ld 3x3 DFN L10.3x3C Coming Soon ISL78302ARFWZ DNAH 2.5 1.2 -40 to +105 10 Ld 3x3 DFN L10.3x3C Coming Soon ISL78302ARCWZ DANJ 1.8 1.2 -40 to +105 10 Ld 3x3 DFN L10.3x3C NOTES: 1. Add “-T*”suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. For other output voltages, contact Intersil. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. For Moisture Sensitivity Level (MSL), please see device information page for ISL78302. For more information on MSL please see techbrief TB363. |
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