Pin Functions

No. 5378-7/13

LC72322R, 72323R

Pin

Pin No.

Functions

I/O

I/O circuit type

PA0

PA1

PA2

PA3

PB0

PB1

PB2

PB3

PC0

PC1

PC2

PC3

PD0

PD1

PD2

PD3

PE0

PE1

PE2

PE3

PF0

PF1

PF2

PF3

PG0

PG1

PG2

PG3

30

31

32

33

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

59

60

61

62

Low-threshold type dedicated input ports

These pins can be used, for example, for key data acquisition.

Built-in pull-down resistors can be specified as an option. This

option is in 4-pin units, and cannot be specified for individual

pins.

Input through these pins is disabled in BACKUP mode.

Dedicated output ports

Since the output transistor impedances are unbalanced

CMOS, these pins can be effectively used for functions such

as key scan timing. These pins go to the output high-

impedance state in BACKUP mode.

These pins go to the low level during a reset, i.e., when the

RES pin is low.

Dedicated output ports

These are normal CMOS outputs. These pins go to the output

high-impedance state in BACKUP mode.

These pins go to the low level during a reset, i.e., when the

RES pin is low.

I/O ports

These pins are switched between input and output as follows:

Once an input instruction (IN, TPT, or TPF) is executed, these

pins latch in the input mode. Once an output instruction (OUT,

SPB, or RPB) is executed, they latch in the output mode.

These pins go to the input mode during a reset, i.e., when the

RES pin is low.

In BACKUP mode these pins go to the input mode with input

disabled.

I/O ports

These pins are switched between input and output by the

FPC instruction.

The I/O states of this port can be specified for individual pins.

These pins go to the input mode during a reset, i.e., when the

RES pin is low.

In BACKUP mode these pins go to the input mode with input

disabled.

Dedicated input ports

Input through these pins is disabled in BACKUP mode.

Input

Output

I/O

Input

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