SY89871UMI datasheet(5/10 Pages) MICREL

Part #	SY89871UMI

Description	2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER

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Manufacturer	MICREL [Micrel Semiconductor]

Direct Link	http://www.micrel.com

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5

Precision Edge®

SY89871U

Micrel, Inc.

M9999-082407

hbwhelp@micrel.com or (408) 955-1690

TIMING DIAGRAM

VIN Swing

/RESET

IN

/IN

/QB

QB

QA

/QA

tPD

tRR

VCC/2

VOUT Swing

V

CC = 3.3V ±10% or 2.5V ±5%; TA = –40°C to +85°C, unless otherwise stated.

Symbol

Parameter

Condition

Min

Typ

Max

Units

f

MAX

Maximum Output Toggle Frequency

Output Swing ž 400mV

2.5

GHz

Maximum Input Frequency

Note 10

3.2

GHz

t

PD

Differential Propagation Delay

Input Swing < 400mV

460

580

710

ps

IN-to-QA or QB

Input Swing ž 400mV

420

550

670

ps

t

SKEW

Within-Device Skew (Differential)

Note 11

715

ps

QB0-to-QB1

Within-Device Skew (Differential)

Note 11

12

30

ps

QA-to-QB

Part-to-Part Skew (Differential)

Note 11

250

ps

tJITTER

Cycle-to-Cycle Jitter

Note 12

1psRMS

Total Jitter

Note 13

10

psPP

t

RR

Reset Recovery Time

600

ps

tr, tf

Output Rise/Fall Times

70

150

250

ps

(20% to 80%)

Notes:

9. Measured with 400mV input signal, 50% duty cycle, all loading with 50ý to VCC–2V, unless otherwise stated.

10. Bank A (pass-through) maximum frequency is limited by the output stage. Bank B (input-to-output ÷2, ÷4, ÷8, ÷16) can accept an input frequency

>3GHz, while Bank A will be slew rate limited.

11. Skew is measured between outputs under identical transitions.

12. Cycle-to-cycle jitter definition: the variation in period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER_cc =Tn–Tn+1,

where T is the time between rising edges of the output signal.

13. Total jitter definition: with an ideal clock input, of frequency - fMAX (device), no more than one output edge in 10

12 output edges will deviate by

more than the specified peak-to-peak jitter value.

AC ELECTRICAL CHARACTERISTICS(9)

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