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LC662312A Datasheet(PDF) 6 Page - Sanyo Semicon Device |
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LC662312A Datasheet(HTML) 6 Page - Sanyo Semicon Device |
6 / 26 page No. 5485-6/26 LC665304A, 665306A, 665308A, 665312A, 665316A Pin I/O Overview Output driver type Options State after a Standby mode reset operation P50 P51 P52 P53/INT2 P60/SI1 P61/SO1 P62/SCK1 P63/PIN1 P80/DS0 P81/DS1 P82 P83 PC0 PC1 PC2/INV2I PC3/INV2O PD0/AN1/ INV3I PD1/AN2/ INV3O PD2/AN3 INV4I PD3/AN4/ INV4O PE0/XT1 PE1/XT2 I/O ports P50 to P53 • Input or output in 4-bit or 1-bit units • Input or output in 8-bit units when used in conjunction with P40 to P43. • Can be used for output of 8-bit ROM data when used in conjunction with P40 to P43. • P53 is also used as the INT2 interrupt request. I/O ports P60 to P63 • Input or output in 4-bit or 1-bit units • P60 is also used as the serial input SI1 pin. • P61 is also used as the serial output SO1 pin. • P62 is also used as the serial clock SCK1 pin. • P63 is also used for the event count input to timer 1. Dedicated output ports P80 to P83 • Output in 4-bit or 1-bit units • The contents of the output latch are input using input instructions. • P80 is a buffer input or a zero-cross buffer input and P81 is a buffer input (options). I/O ports PC0 to PC3 • Output in 4-bit or 1-bit units • Dedicated inverter circuits (option) Dedicated input ports PD0 to PD3 • Can be switched in software to function as 16-value analog inputs. • Dedicated inverter circuits (option) Dedicated input ports and sub-oscillator connections I/O I/O O I/O I I • Pch: Pull-up MOS type • Nch: Intermediate sink current type • Pch: MOS type • Nch: Intermediate sink current type • Nch: +7-V handling when OD option selected (P61 and P63 only) • Pch: CMOS type • Nch: Intermediate sink current type • Pch: CMOS type • Nch: Intermediate sink current type • Inverter circuits can be selected as options. • Pch: CMOS type • Nch: Intermediate sink current type • Pull-up MOS or Nch OD output • Output level on reset • CMOS or Nch OD output • CMOS or Pch OD output • Output level at reset • Buffer circuit • Zero-cross detector buffer circuit • CMOS or Nch OD output • Inverter circuit Inverter circuit Sub-oscillator/port PE selection High or low (option) H High or low Buffered I/O (option) H Normal input or inverter I/O (option) Selected as an option Hold mode: Output off Hold mode: Output off Halt mode: Output retained Hold mode: Port output off, buffer output off Hold mode: Port output off, inverter output off Inverter: • Hold mode: Output off • Halt mode: Output continues Sub- oscillator: Hold mode: Oscillator stopped Halt mode: Oscillator operates Halt mode: Port output retained, inverter output continues. Halt mode: Port output retained, buffer output continues with the buffer resistor off. Halt mode: Output retained Continued on next page. |
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