PCA9525

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© NXP B.V. 2011. All rights reserved.

Product data sheet

Rev. 1 — 25 February 2011

6 of 22

NXP Semiconductors

PCA9525

Simple 2-wire bus buffer

[1]

Guaranteed by design, not subject to test.

[2]

Supply voltage dependent; refer to graphs (Figure 5 through Figure 8) for typical trend.

Enable (EN)

enable threshold voltage

2.0

-

-

V

4.8

-

-

V

disable threshold voltage

--0.9

V

--2.1

V

hysteresis voltage

100

-

-

mV

200

-

-

mV

input leakage current

--

±0.1

μA

Direction (DIR)

direction input voltage

direction SCL_OUT to SCL_IN

2.0

-

-

V

4.8

-

-

V

direction SCL_IN to SCL_OUT

-

-

0.9

V

-

-

2.1

V

hysteresis voltage

100

-

-

mV

200

-

-

mV

input leakage current

--

±0.1

μA

Timing characteristics (Figure 4)

delay time

[1] -17

-

ns

fall time

[1] -3.5

-

ns

Table 4.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Fig 4.

Timing diagram

002aaf332

time

Sxx_IN

Sxx_OUT