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LPC2470FET208 Datasheet(PDF) 2 Page - NXP Semiconductors |
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LPC2470FET208 Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 89 page  LPC2470 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 14 February 2011 2 of 89 NXP Semiconductors LPC2470 Flashless 16-bit/32-bit microcontroller EMC provides support for asynchronous static memory devices such as RAM, ROM and flash, as well as dynamic memories such as single data rate SDRAM. Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts. General Purpose DMA controller (GPDMA) on AHB that can be used with the SSP, I2S-bus, and Secure Digital/MultiMediaCard (SD/MMC) interface as well as for memory-to-memory transfers. Serial Interfaces: Ethernet MAC with MII/RMII interface and associated DMA controller. These functions reside on an independent AHB. USB 2.0 full-speed dual port device/host/OTG controller with on-chip PHY and associated DMA controller. Four UARTs with fractional baud rate generation, one with modem control I/O, one with IrDA support, all with FIFO. CAN controller with two channels. SPI controller. Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate for the SPI port, sharing its interrupt. SSPs can be used with the GPDMA controller. Three I2C-bus interfaces (one with open-drain and two with standard port pins). I2S (Inter-IC Sound) interface for digital audio input or output. It can be used with the GPDMA. Other peripherals: SD/MMC memory card interface. 160 General purpose I/O pins with configurable pull-up/down resistors. 10-bit ADC with input multiplexing among 8 pins. 10-bit DAC. Four general purpose timers/counters with 8 capture inputs and 10 compare outputs. Each timer block has an external count input. Two PWM/timer blocks with support for three-phase motor control. Each PWM has an external count inputs. RTC with separate power domain. Clock source can be the RTC oscillator or the APB clock. 2 kB SRAM powered from the RTC power pin, allowing data to be stored when the rest of the chip is powered off. WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator, the RTC oscillator, or the APB clock. Single 3.3 V power supply (3.0 V to 3.6 V). 4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as the system clock. Four reduced power modes: idle, sleep, power-down, and deep power-down. Four external interrupt inputs configurable as edge/level sensitive. All pins on port 0 and port 2 can be used as edge sensitive interrupt sources. Processor wake-up from Power-down mode via any interrupt able to operate during Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet wake-up interrupt, CAN bus activity, port 0/2 pin interrupt). Two independent power domains allow fine tuning of power consumption based on needed features. |
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