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LPC1227FBD64301 Datasheet(PDF) 37 Page - NXP Semiconductors |
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LPC1227FBD64301 Datasheet(HTML) 37 Page - NXP Semiconductors |
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37 / 60 page 
LPC122X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Objective data sheet Rev. 1.1 — 21 February 2011 37 of 60 NXP Semiconductors LPC122x 32-bit ARM Cortex-M0 microcontroller Conditions: BOD disabled; all oscillators and analog blocks disabled in the PDSLEEPCFG register (PDSLEEPCFG =<tbd>). Fig 10. Deep-sleep mode: Typical supply current IDD versus temperature for different supply voltages VDD(3V3) Fig 11. Deep power-down mode: Typical supply current IDD versus temperature for different supply voltages VDD(3V3) 002aag021 20 30 25 35 IDD ( μA) 15 temperature ( °C) −40 85 35 10 60 −15 VDD(3V3) = 3.6 V 3.3 V 3.0 V <tbd> X (X) XX X XX X 001aab173 X X X X X X (X) X |
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