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CY14B101P Datasheet(PDF) 12 Page - Cypress Semiconductor |
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CY14B101P Datasheet(HTML) 12 Page - Cypress Semiconductor |
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12 / 35 page  PRELIMINARY CY14B101P Document #: 001-61932 Rev. *A Page 12 of 35 RTC Access CY14B101P uses 16 registers for RTC. These registers can be read out or written to by accessing all 16 registers in burst mode or accessing each register, one at a time. The RDRTC and WRTC instructions are used to access the RTC. All the RTC registers can be read in burst mode by issuing the RDRTC instruction and reading all 16 bytes without bringing the CS pin HIGH. The ‘R’ bit must be set while reading the RTC timekeeping registers to ensure that transitional values of time are not read. Writes to the RTC register are performed using the WRTC instruction. Writing RTC timekeeping registers and control registers, except for the flags register needs the ‘W’ bit of the flags register to be set to ‘1’. The internal counters are updated with the new date and time setting when the ‘W’ bit is cleared to ‘0’. All the RTC registers can also be written in burst mode using the WRTC instruction. Figure 11. Burst Mode Read Instruction Timing Figure 12. Write Instruction Timing Figure 13. Burst Mode Write Instruction Timing CS SCK SO LSB SI Op-Code 17-bit Address MSB LSB 01 2 3 456 7 0 7 6 5 4 3 2 1 20 21 22 23 0123 4 5 67 0 1 234 567 0 7 00 00 00 11 0 0 00 00 0 A16 A3 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 Data Byte 1 Data Byte N MSB LSB MSB D0 D1 D2 D3 D4 D5 D6 D7 D0 D7 CS SCK SO 0123 4 5 6 7 0 7 6 5 4 3 2 1 20 21 22 23 01234567 MSB LSB Data D0 D1 D2 D3 D4 D5 D6 D7 SI Op-Code 00 00 001 00 0 0 0 0 0 0 A16 A3 A1 A2 A0 17-bit Address MSB LSB HI-Z CS SCK SO MSB LSB SI Op-Code 17-bit Address MSB LSB 0 1 234 567 0 7 6 5 4 3 2 1 20 21 22 23 0 1 234 567 0 1 234 567 0 7 0 0 00 00 1 0 000000 0 A16 A3 A2 A1 A0 HI-Z Data Byte 1 Data Byte N D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 D0 D7 [+] Feedback [+] Feedback |
Similar Part No. - CY14B101P_11 |
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Similar Description - CY14B101P_11 |
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