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TPS61301 Datasheet(PDF) 10 Page - Texas Instruments |
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TPS61301 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 78 page  TPS61300, TPS61301, TPS61305 SLVS957A – JUNE 2009 – REVISED SEPTEMBER 2010 www.ti.com PIN FUNCTIONS (TPS61300) PIN I/O DESCRIPTION NAME NO. AVIN E4 I This is the input voltage pin of the device. Connect directly to the input bypass capacitor. VOUT A2 O This is the output voltage pin of the converter. LED1 E2 I LED return input. This feedback pin regulates the LED current through the internal sense resistor by regulating the voltage across it. The regulation operates with typically 400mV (HC_SEL = L) or 400mV LED2 E1 I (HC_SEL = H) dropout voltage. Connect to the cathode of the LEDs. LED3 E3 I FLASH_SYNC B4 I Flashlight strobe pulse synchronization input. FLASH_SYNC = LOW: The device is operating and regulating the LED current to the DC light current level (DCLC). FLASH_SYNC = HIGH: The device is operating and regulating the LED current to the flashlight current level (FC). HC_SEL B3 I Extended high-current mode selection input. This pin must not be left floating and must be terminated. HC_SEL = LOW: LED direct drive mode. The power stage is active and the maximum LED currents are defined as 400mA/800mA/400mA (ILED1/ILED2/ILED3). HC_SEL = HIGH: Energy storage mode. In flash mode, the power stage is either active with reduced current capability or disabled. The maximum LED current is defined as 925mA/1850mA/925mA (ILED1/ILED2/ILED3). SCL B2 I Serial interface clock line. This pin must not be left floating and must be terminated. SDA B1 I/O Serial interface address/data line. This pin must not be left floating and must be terminated. GPIO/PG D4 I/O This pin can either be configured as a general purpose input/output pin (GPIO) or either as an open-drain or a push-pull output to signal when the converters output voltage is within the regulation limits (PG). Per default, the pin is configured as an open-drain power-good output. ENVM C4 I Enable pin for voltage mode converter. Pulling this pin high forces the device into voltage regulation mode (VOUT is preset to a fixed value, 4.95V). INDLED A1 O This pin provides a constant current source to drive low VF LEDs. Connect to LED anode. ENDCL D3 I Hardware control pin for DC light operation. Pulling this pin high forces the device into DC light operation. The ENDCL input is only active when the device is programmed into shutdown or voltage mode regulation. LED1-3 inputs are controlled according to ENLED[3:1] bit settings. Tx-MASK C3 I RF PA synchronization control input. Pulling this pin high turns the LED from flashlight to DC light operation, thereby reducing almost instantaneously the peak current loading from the battery. SW C1 I/O Inductor connection. Drain of the internal power MOSFET. Connect to the switched side of the inductor. SW C2 is high impedance during shutdown. BAL A3 O Balancing output for dual cells super-capacitor. In steady-state operation, this output compensates for leakage current mismatch between the cells. PGND D1 Power ground. Connect to AGND underneath IC. D2 AGND A4 Analog ground. 10 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): TPS61300, TPS61301, TPS61305 |
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