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ATMEGA16U4PRE Datasheet(PDF) 17 Page - ATMEL Corporation |
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ATMEGA16U4PRE Datasheet(HTML) 17 Page - ATMEL Corporation |
17 / 433 page 17 7766E–AVR–04/10 ATmega16U4/ATmega32U4 4.8.1 Interrupt Response Time The interrupt execution response for all the enabled AVR interrupts is five clock cycles minimum. After five clock cycles the program vector address for the actual interrupt handling routine is exe- cuted. During these five clock cycle period, the Program Counter is pushed onto the Stack. The vector is normally a jump to the interrupt routine, and this jump takes three clock cycles. If an interrupt occurs during execution of a multi-cycle instruction, this instruction is completed before the interrupt is served. If an interrupt occurs when the MCU is in sleep mode, the interrupt exe- cution response time is increased by five clock cycles. This increase comes in addition to the start-up time from the selected sleep mode. A return from an interrupt handling routine takes five clock cycles. During these five clock cycles, the Program Counter (three bytes) is popped back from the Stack, the Stack Pointer is incre- mented by three, and the I-bit in SREG is set. Assembly Code Example sei ; set Global Interrupt Enable sleep ; enter sleep, waiting for interrupt ; note: will enter sleep before any pending ; interrupt(s) C Code Example __enable_interrupt(); /* set Global Interrupt Enable */ __sleep(); /* enter sleep, waiting for interrupt */ /* note: will enter sleep before any pending interrupt(s) */ |
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