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AT24C32D Datasheet(PDF) 1 Page - ATMEL Corporation |
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AT24C32D Datasheet(HTML) 1 Page - ATMEL Corporation |
1 / 26 page ![]() Features • Low-voltage and Standard-voltage Operation –V CC = 1.7 to 5.5V • Internally Organized 4096 x 8, 8192 x 8 • 2-Wire Serial Interface • Schmitt Trigger, Filtered Inputs for Noise Suppression • Bi-directional Data Transfer Protocol • 1MHz (5.0V) and 400KHz (1.8V Compatibility) • Write Protect Pin for Hardware Data Protection • 32-Byte Page Write Mode (Partial Page Writes Allowed) • Self-Timed Write Cycle (5ms max) • High Reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years • Lead-free/Halogen-free Devices • 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead UDFN, 8-lead XDFN, 5-lead SOT23 and 8-ball VFBGA • Die Sales: Wafer Form, Waffle Pack and Bumped Wafers Description The Atmel® AT24C32D/64D provides 32,768-/65,536-bits of serial electrically eras- able and programmable read only memory (EEPROM) organized as 4096/8192 words of 8-bits each. The device’s cascadable feature allows up to eight devices to share a common 2-wire bus. The device is optimized for use in many industrial and commer- cial applications where low power and low voltage operation are essential. The AT24C32D/64D is available in space saving 8-lead JEDEC SOIC, 8-lead TSSOP, 8- lead UDFN, 8-lead XDFN, 5-lead SOT23 and 8-ball VFBGA and is accessed via a 2- wire serial interface. In addition, the entire family operates from 1.7V to 5.5V. VCC WP SCL SDA A0 A1 A2 GND 4 3 2 1 5 6 7 8 8-lead UDFN Bottom View A0 A1 A2 GND 1 2 3 4 8 7 6 5 8-lead SOIC VCC WP SCL SDA SCL GND SDA 1 2 3 5 4 5-lead SOT23 WP VCC 8-lead TSSOP 1 2 3 4 8 7 6 5 A0 A1 A2 GND VCC WP SCL SDA VCC WP SCL SDA A0 A1 A2 GND 1 2 3 4 8 7 6 5 8-ball VFBGA Bottom View VCC WP SCL SDA A0 A1 A2 GND 4 3 2 1 5 6 7 8 8-lead XDFN Bottom View 2-Wire Serial Electrically Erasable and Programmable Read-only Memory 32K (4096 x 8) 64K (8192 x 8) Atmel AT24C32D Atmel AT24C64D 8717B–SEEPR–6/10 2-Wire, 32K Serial E2PROM Note: For use of 5-lead SOT23, the software A2, A1, and A0 bits in the device address word must be set to zero to properly communicate Table 0-1. Pin Configurations Pin Name Function A0 - A2 Address Inputs SDA Serial Data SCL Serial Clock Input WP Write Protect |
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