5

Codec Timing Information

Sample Rate

Bit Sequence at Decoder Input

“Run of Threes”

Output Level

(%)

(dBm0)

16kbit/s

11011011010010010010

0

-29.2

± 2

32kbit/s

1101101101010100100100100100101010110110

0

-30.0

± 2

16kbit/s

11111011010000010010

30

0

± 1

32kbits

1111110110101010000100000010010101011110

30

0

± 1

Table 1 Bit Sequence Tests and Results

at 800Hz

Decoder Input pin, the analogue signals measured at the Decoder Output pin are 800Hz

± 10Hz at the levels

described.

Fig.4 Codec Timing Diagrams

DECODER TIMING

ENCODER TIMING

MULTIPLEXING FUNCTION

HIGH Z

HIGH Z

t

DR

t

DF

DATA TRUE TIME

t

SU

t

H

DATA CLOCKED

DATA CLOCKED

t

PCO

ENCODER

CLOCK

ENCODER DATA

OUTPUT

DECODER

CLOCK

DECODER DATA

INPUT

ENCODER

OUTPUT

DATA ENABLE

TIMING

t

CH

Clock '1' Pulse Width

t

IR

Clock Rise Time

t

t

1.0

µs Min.

100ns Typ.

450ns Min.

t

CL

Clock '0' Pulse Width

t

IF

Clock Fall Time

t

t

1.0

µs Min.

100ns Typ.

600ns Min.

750ns Max.

t

t

Xtal Input Frequency

100ns Typ.

100ns Typ.

1.024MHz.