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FX602D4 Datasheet(PDF) 4 Page - CML Microcircuits |
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FX602D4 Datasheet(HTML) 4 Page - CML Microcircuits |
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Calling Line Identifier FX602 © 1998 Consumer Microcircuits Limited 4 D/602/7 1.3 Signal List Packages D4 / P3 Signal Description Pin No. Name Type 1 XTALN O/P The output of the on-chip Xtal oscillator inverter. 2 XTAL I/P The input to the on-chip Xtal oscillator inverter. 3 RD I/P (S) Input to the Ring or Line Polarity Reversal Detector. 4 RT BI Open-drain output and Schmitt trigger input forming part of the Ring or Line Polarity Reversal detector. An external resistor to VDD and a capacitor to VSS should be connected to RT to filter and extend the RD input signal. 5 AOP BI The output of the on-chip Input Signal Amplifier and the input to the Bandpass Filter. 6 INV I/P The inverting input to the on-chip Input Signal Amplifier. 7 NINV I/P The non-inverting input to the on-chip Input Signal Amplifier. 8 VSS Power Negative supply rail (signal ground). 9 VBIAS O/P Internally generated bias voltage, held at VDD/2 when the device is not in 'Zero-Power' mode. Should be decoupled to VSS by a capacitor mounted close to the device pins. 10 MODE I/P (S) Input used to select the operating mode. See section 1.5.1. 11 ZP I/P (S) A high level on this input selects 'Zero-Power' mode, a low level enables the Input Signal Amplifier, the Bandpass Filter and either the FSK or the Tone Alert circuits depending on the MODE input. |
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