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IC-WDCDFN10 Datasheet(PDF) 10 Page - IC-Haus GmbH |
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IC-WDCDFN10 Datasheet(HTML) 10 Page - IC-Haus GmbH |
10 / 12 page iC-WD A/B/C SWITCHED-MODE DUAL VOLTAGE REGULATOR Rev D1, Page 10/12 this internal resistance can determine the maximum available output current (equation 4). The EMI (electromagnetic interference) caused by the coil should be taken into account. Toroidal core coils have little noise radiation but are expensive and difficult to install. Bar cores are reasonably priced and easy to handle but emit higher radiation. Reasonably priced RF chokes in the range of a few tens to a few hundreds µH are suitable for modest EMI requirements.∗ Additional interference may be caused by decaying of the voltage at VHL when the coil current drops to zero (Fig. 6). Parasitic capacitances at VHL form an oscil- lating circuit with the coil. This undesirable oscillating circuit can be damped to an uncritical magnitude by installing a resistor (> 10 kΩ) parallel to the coil. The selection of the backup capacitor CVH is unprob- lematic. Due to the series regulators, the ripple of the intermediate voltage VH does not affect the out- put voltages VCC and VCCA. Therefore a low capac- itance level without special demands on the internal resistance is sufficient. A combination of electrolytic and ceramic capacitor (e.g. 4.7 µF/100 nF) is recom- mended. Tantalum capacitors are also possible when they are allowed to operate at AC amplitudes like the residual ripple of voltage VH. The stability of the series regulators is guaranteed for the entire load range when the values for CVCC and CVCCA given in the electrical characteristics are se- lected. The suppression of interference voltage is im- proved by small capacitor series resistors. The combi- nation of tantalum and ceramic capacitors is also rec- ommended in this case. If one of the two outputs re- mains open, its capacitor can be omitted. To avoid feedback of interference from supply volt- age VB onto output voltages VCC and VCCA, provide blocking directly at pin VB. A combination of tantalum and ceramic capacitors is also recommended in this case (several µF/100 nF). PRINTED CIRCUIT BOARD LAYOUT The GND path from the switching regulator and from each series regulator should be strictly separated to avoid cross couplings. The neutral point of all GND conductors is the GND connection at the iC-WD. It is possible and not critical, however, to route the GND of the supply VB and the base point of capacitor CVH to- gether to the neutral point. The capacitor CVH should be very close to the pin VH however. To keep down the decay at the open end of the coil (pin VHL), the capac- itance of this connection should be low, that means the connection should be short. The blocking capacitors of supply voltage VB are to be placed as close as possible to pins VB and GND. The capacitors for the outputs VCC and VCCA should be placed directly by the load and not directly by the iC to also block interferences which are coupled via the wiring to the load. A ground plane should be cut out underneath the wiring of CVCC and CVCCA. The printed circuit conductor between VB, the shunt RVB, and VBR should have a low impedance, since voltage drops in the supply path change the effective size of the shunt and reduce the maximum cut-off current. The Thermal Pad (optional with the SO8) should be connected to an appropriate copper area on the PCB. It has proven to be advantageous to use thermal vias directly underneath the iC to transfer the power dissi- pation to a different layer, e.g. a ground plane. ∗ e.g.: Siemens Matsushita B78108-S1224-J (220 µH/250 mA, axial leads), TDK series NLC565050T-. . . (SMD), TOKO series 10RF459-. . . (SMD shielded) |
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