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ADC1415S065 Datasheet(PDF) 10 Page - NXP Semiconductors |
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ADC1415S065 Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 33 page ADC1415S065_080_105_125_2 © NXP B.V. 2009. All rights reserved. Objective data sheet Rev. 02 — 4 June 2009 10 of 33 NXP Semiconductors ADC1415S065/080/105/125 Single 14-bit ADC 65, 80, 105 or 125 Msps with input buffer 10.3 SPI Timings Table 9. Characteristics Typical values measured at VDDA(3V) =3V, VDDO = 1.8 V, VDDA(5V) =5V, Tamb =25 °C and CL = 5 pF; min and max values are across the full temperature range Tamb = −40 °C to +85 °C at VDDA(3V) =3V, VDDO = 1.8 V; VDDA(5V) =5 V, Symbol Parameter Conditions Min Typ Max Unit SPI timings tw(SCLK) SCLK pulse width 40 - - ns tw(SCLKH) SCLK pulse width HIGH 16 - - ns tw(SCLKL) SCLK pulse width LOW 16 - - ns tsu set-up time data to SCLKH 5 - - ns CS to SCLKH 5 - - ns th hold time data to SCLKH 2 - - ns CS to SCLKH 2 - - ns fclk(max) maximum clock frequency - - 25 MHz |
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