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SL2S2002FUD Datasheet(PDF) 7 Page - NXP Semiconductors |
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SL2S2002FUD Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 13 page SL2S2002_SL2S2102_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product short data sheet PUBLIC Rev. 3.2 — 10 January 2011 198332 7 of 13 NXP Semiconductors SL2S2002; SL2S2102 ICODE SLIX 8. Limiting values [1] Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any conditions other than those described in the operating conditions and electrical characteristics sections of this specification is not implied. [2] This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima. [3] The voltage between LA and LB is limited by the on-chip voltage limitation circuitry (corresponding to parameter II). [4] For ESD measurement, the IC was mounted in a CDIP8 package. Table 5. Limiting values (Wafer)[1][2] In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Tstg storage temperature −55 +125 °C Ptot total power dissipation - 125 mW Tj junction temperature −40 +85 °C Ii(max) maximum input current LA to LB; peak [3] - ±60 mA II input current LA to LB; RMS - 30 mA VESD electrostatic discharge voltage Human body model [4] - ±2kV |
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